LTC1852IFW#PBF Linear Technology, LTC1852IFW#PBF Datasheet - Page 6

IC A/D CONV 8CH 10BIT 48-TSSOP

LTC1852IFW#PBF

Manufacturer Part Number
LTC1852IFW#PBF
Description
IC A/D CONV 8CH 10BIT 48-TSSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1852IFW#PBF

Number Of Bits
10
Sampling Rate (per Second)
400k
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
15mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TFSOP (0.240", 6.10mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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TIMING CHARACTERISTICS
LTC1852/LTC1853
range, otherwise specifi cations are at T
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
TYPICAL PERFORMANCE CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with OGND and GND
wired together unless otherwise noted.
Note 3: When these pin voltages are taken below ground or above V
they will be clamped by internal diodes. This product can handle input
currents of 100mA below ground or above V
Note 4: When these pin voltages are taken below ground, they will be
clamped by internal diodes. This product can handle input currents of
100mA below ground without latchup. These pins are not clamped to V
Note 5: V
specifi ed.
Note 6: Linearity, offset and full-scale specifi cations apply for a single-
ended input on any channel with COM grounded.
Note 7: Integral nonlinearity is defi ned as the deviation of a code from a
6
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
DD
= 5V, f
PARAMETER
CONVST High Time
Latch Setup Time
Latch Hold Time
WR Low Time
WR High Time
M1 to M0 Setup Time
M0 to BUSY Delay
M0 to WR (or RD) Setup Time
M0 High Pulse Width
RD High Time Between Readback Reads
Last WR (or RD) to M0
M0 to RD Setup Time
M0 to CONVST
Aperture Delay
Aperture Jitter
–0.5
–1.0
SAMPLE
1.0
0.5
0
0
Differential Linearity
= 400kHz, t
r
CODE
= t
f
= 2ns unless otherwise
DD
A
= 25°C. (Note 5)
without latchup.
4096
1852 F02
The
CONDITIONS
(Note 10)
(Note 10)
(Notes 9, 10)
(Note 10)
(Note 10)
(Notes 9, 10)
M1 High
(Notes 9, 10)
(Note 10)
(Note 10)
(Note 10)
(Notes 9, 10)
(Note 10)
denotes the specifi cations which apply over the full operating temperature
DD
,
DD
.
straight line passing through the actual end points of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: Bipolar offset is the offset voltage measured from – 0.5LSB when
the output code fl ickers between 1111 1111 1111 and 0000 0000 0000.
For the LTC1853 and between 11 1111 1111 and 00 0000 0000 for the
LTC1852.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note 11: The falling CONVST edge starts a conversion. If CONVST returns
high at a critical point during the conversion it can create small errors.
For the best results, ensure that CONVST returns high either within 400ns
after the start of the conversion or after BUSY rises.
Note 12: The analog input range is determined by the voltage on
REFCOMP . The gain error specifi cation is tested with an external 4.096V
but is valid for any value of REFCOMP greater than 2V and less than
(V
Note 13: MUX address is updated immediately after BUSY falls.
DD
– 0.5V.)
–100
–120
–20
–40
–60
–80
0
0
8192 Point FFT with
f
IN
= 39.599kHz
MIN
50
10
10
50
50
10
t
50
50
10
t
t
19
19
19
FREQUENCY (kHz)
– 0.5
TYP
20
2
1852 F03
200
MAX
UNITS
ps
18523fa
RMS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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