MAX1091BEEI+ Maxim Integrated Products, MAX1091BEEI+ Datasheet - Page 10

• Manufacturer Part Number: MAX1091BEEI+
• Description: IC ADC 10BIT 250KSPS 28-QSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX1091BEEI+

• Number Of Bits: 10
• Sampling Rate (per Second): 250k
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 667mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-QSOP
• Number Of Adc Inputs: 8
• Architecture: SAR
• Conversion Rate: 250 KSPs
• Resolution: 10 bit
• Input Type: Differential
• Interface Type: Parallel
• Voltage Reference: Internal 2.5 V or External
• Supply Voltage (max): 3 V
• Maximum Power Dissipation: 762 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Internal protection diodes, which clamp the analog
input to V
swing within (GND - 300mV) to (V
damage. However, for accurate conversions near full
scale, both inputs must not exceed (V
less than (GND - 50mV).
If an off-channel analog input voltage exceeds the sup-
plies by more than 50mV, limit the forward-bias input
current to 4mA.
250ksps, +3V, 8-/4-Channel, 10-Bit ADCs
with +2.5V Reference and Parallel Interface
Figure 3a. MAX1091 Simplified Input Structure
Figure 3b. MAX1093 Simplified Input Structure
10
SINGLE-ENDED MODE: IN+ = CH0–CH3, IN- = COM
PSEUDO-DIFFERENTIAL MODE: IN+ AND IN- SELECTED FROM PAIRS OF
SINGLE-ENDED MODE: IN+ = CH0–CH7, IN- = COM
PSEUDO-DIFFERENTIAL MODE: IN+ AND IN- SELECTED FROM PAIRS OF
COM
COM
CH0
CH1
CH2
CH3
______________________________________________________________________________________
CH0
CH2
CH4
CH6
CH1
CH3
CH5
CH7
REF
REF
DD
INPUT
INPUT
MUX
MUX
and GND, allow each input channel to
10-BIT CAPACITIVE DAC
10-BIT CAPACITIVE DAC
C
C
SWITCH
SWITCH
–
–
C
12pF
C
12pF
HOLD
HOLD
TRACK
TRACK
SWITCH
SWITCH
CH0/CH1, CH2/CH3, CH4/CH5, AND CH6/CH7
CH0/CH1 AND CH2/CH3
+
+
Analog Input Protection
T/H
T/H
R
800Ω
R
800Ω
IN
IN
HOLD
HOLD
ZERO
ZERO
DD
AT THE SAMPLING INSTANT,
THE MUX INPUT SWITCHES
FROM THE SELECTED IN+
CHANNEL TO THE SELECTED
IN- CHANNEL.
AT THE SAMPLING INSTANT,
THE MUX INPUT SWITCHES
FROM THE SELECTED IN+
CHANNEL TO THE SELECTED
IN- CHANNEL.
COMPARATOR
COMPARATOR
+ 300mV) without
DD
+ 50mV) or be
The MAX1091/MAX1093 T/H stage enters its tracking
mode on the rising edge of WR. In external acquisition
mode, the part enters its hold mode on the next rising
edge of WR. In internal acquisition mode, the part
enters its hold mode on the fourth falling edge of clock
after writing the control byte. Note that, in internal clock
mode, this occurs approximately 1µs after writing the
control byte. In single-ended operation, IN- is connected
to COM and the converter samples the positive (+)
input. In pseudo-differential operation, IN- connects to
the negative input (-), and the difference of (IN+) - (IN-) is
sampled. At the beginning of the next conversion, the
positive input connects back to IN+ and C
charges to the input signal.
The time required for the T/H stage to acquire an input
signal depends on how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens, and more time must be
allowed between conversions. The acquisition time,
t
the signal and is also the minimum time required for the
signal to be acquired. Calculate this with the following
equation:
where R
R
the ADC’s input capacitance. Source impedances
below 3kΩ have no significant impact on the MAX1091/
MAX1093’s AC performance.
Higher source impedances can be used if a 0.01µF
capacitor is connected to the individual analog inputs.
Together with the input impedance, this capacitor
forms an RC filter, limiting the ADC’s signal bandwidth.
The MAX1091/MAX1093 T/H stage offers a 250kHz full-
linear and a 3MHz full-power bandwidth, enabling
these parts to use undersampling techniques to digitize
high-speed transients and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate.
To avoid high-frequency signals being aliased into the
frequency band of interest, anti-alias filtering is recom-
mended.
Initiate a conversion by writing a control byte that
selects the multiplexer channel and configures the
MAX1091/MAX1093 for either unipolar or bipolar opera-
tion. A write pulse (WR + CS) can either start an acqui-
sition interval or initiate a combined acquisition plus
ACQ
IN
(800Ω) is the input resistance, and C
, is the maximum time the device takes to acquire
S
is the source impedance of the input signal,
t
ACQ
= 7 (R
S
Starting a Conversion
+ R
IN
Input Bandwidth
) C
IN
Track/Hold
IN
(12pF) is
HOLD