MAX146ACAP+ Maxim Integrated Products, MAX146ACAP+ Datasheet - Page 13

• Manufacturer Part Number: MAX146ACAP+
• Description: IC ADC LP 12-BIT 133KSPS 20-SSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX146ACAP+

• Number Of Bits: 12
• Sampling Rate (per Second): 133k
• Data Interface: MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 640mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP
• Architecture: SAR
• Conversion Rate: 133 KSPs
• Resolution: 12 bit
• Interface Type: 4-Wire (SPI, QSPI, MICROWIRE, TMS320)
• Voltage Reference: Internal 2.5 V or External
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

In external clock mode, the external clock not only shifts
data in and out, but it also drives the analog-to-digital
conversion steps. SSTRB pulses high for one clock
period after the last bit of the control byte. Succes-
sive-approximation bit decisions are made and appear
at DOUT on each of the next 12 SCLK falling edges
(Figure 6). SSTRB and DOUT go into a high-impedance
state when CS goes high; after the next CS falling edge,
SSTRB outputs a logic low. Figure 8 shows the SSTRB
timing in external clock mode.
Figure 7. Detailed Serial-Interface Timing
Figure 8. External Clock Mode SSTRB Detailed Timing
SSTRB
SCLK
DOUT
SCLK
CS
DIN
CS
t
CSH
______________________________________________________________________________________
t
DV
t
CSS
t
DS
t
SDV
t
DH
•
• • •
• • •
• • •
External Clock
t
CL
+2.7V, Low-Power, 8-Channel,
PD0 CLOCKED IN
t
CH
• • •
• • •
• • •
• • •
The conversion must complete in some minimum time,
or droop on the sample-and-hold capacitors may
degrade conversion results. Use internal clock mode if
the serial clock frequency is less than 100kHz, or if
serial clock interruptions could cause the conversion
interval to exceed 120µs.
In internal clock mode, the MAX146/MAX147 generate
their own conversion clocks internally. This frees the µP
from the burden of running the SAR conversion clock
and allows the conversion results to be read back at the
t
SSTRB
Serial 12-Bit ADCs
t
DO
• • •
t
SSTRB
• • • •
• • •
t
CSH
t
TR
Internal Clock
t
STR
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