KAD5512HP-25Q48 Intersil, KAD5512HP-25Q48 Datasheet - Page 23

IC ADC 12BIT 250MSPS SGL 48-QFN

KAD5512HP-25Q48

Manufacturer Part Number
KAD5512HP-25Q48
Description
IC ADC 12BIT 250MSPS SGL 48-QFN
Manufacturer
Intersil
Series
FemtoCharge™r
Datasheet

Specifications of KAD5512HP-25Q48

Number Of Bits
12
Sampling Rate (per Second)
250M
Data Interface
Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
463mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VQFN
For Use With
KDC5512-Q48EVAL - DAUGHTER CARD FOR KAD5512KDC5512H-Q48EVAL - DAUGHTER CARD FOR KAD5512KDC5512HEVAL - DAUGHTER CARD FOR KAD5512
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KAD5512HP-25Q48
Manufacturer:
UMS
Quantity:
1 400
SPI Physical Interface
The serial clock pin (SCLK) provides synchronization for the
data transfer. By default, all data is presented on the serial
data input/output (SDIO) pin in three-wire mode. The state of
the SDIO pin is set automatically in the communication
SCLK
SDIO
SCLK
SDIO
CSB
CSB
CSB
SCLK
SDIO
SDO
CSB
SDIO
SCLK
t
S
t
R/W
S
R/W
t
DSW
t
DSW
INSTRUCTION/ADDRESS
INSTRUCTION/ADDRESS
W1
23
W1
W0
W0
A12
t
A12
DHW
t
DHW
WRITING A READ COMMAND
A11
t
A11
HI
t
HI
A10
FIGURE 38. N-BYTE TRANSFER
FIGURE 37. 2-BYTE TRANSFER
A10
t
LO
t
LO
FIGURE 35. SPI WRITE
A9
FIGURE 36. SPI READ
t
A9
KAD5512HP
CLK
t
CLK
SPI WRITE
A2
SPI READ
CSB STALLING
A8
DATA WORD 1
CSB STALLING
LAST LEGAL
A1
t
A7
DVR
DATA WORD 1
A0
protocol (described in the following). A dedicated serial data
output pin (SDO) can be activated by setting 0x00[7] high to
allow operation in four-wire mode.
The SPI port operates in a half duplex master/slave
configuration, with the KAD5512HP functioning as a slave.
READING DATA
D7
D7
D5
D6
D4
D3
(4 WIRE MODE)
D3
D3
(3 WIRE MODE)
D2
D2
D2
t
DHR
D1 D0
D1
D1
t
H
DATA WORD N
DATA WORD 2
D0
D0
t
H
October 1, 2009
FN6808.3

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