ADC108S022CIMT/NOPB National Semiconductor, ADC108S022CIMT/NOPB Datasheet - Page 2

ADC 10BIT 8CH 50-200KSPS

ADC108S022CIMT/NOPB

Manufacturer Part Number
ADC108S022CIMT/NOPB
Description
ADC 10BIT 8CH 50-200KSPS
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheet

Specifications of ADC108S022CIMT/NOPB

Number Of Bits
10
Sampling Rate (per Second)
200k
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
6.4mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Number Of Elements
1
Resolution
10Bit
Architecture
SAR
Sample Rate
200KSPS
Input Polarity
Unipolar
Input Type
Voltage
Rated Input Volt
5.25V
Differential Input
No
Power Supply Requirement
Analog and Digital
Single Supply Voltage (typ)
3.3/5V
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.25V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Differential Linearity Error
±0.3LSB
Integral Nonlinearity Error
±0.3LSB
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Input Signal Type
Single-Ended
For Use With
ADC108S022EVAL - BOARD EVALUATION FOR ADC108S022
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*ADC108S022CIMT
*ADC108S022CIMT/NOPB
ADC108S022CIMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADC108S022CIMT/NOPB
Manufacturer:
TI/德州仪器
Quantity:
20 000
www.national.com
ANALOG I/O
DIGITAL I/O
POWER SUPPLY
Block Diagram
Pin Descriptions
Pin No.
4 - 11
16
15
14
13
12
1
2
3
IN0 to IN7
Symbol
AGND
DGND
DOUT
SCLK
DIN
CS
V
V
D
A
Analog inputs. These signals can range from 0V to V
Digital clock input. The guaranteed performance range of frequencies for this input is 0.8
MHz to 3.2 MHz. This clock directly controls the conversion and readout processes.
Digital data output. The output samples are clocked out of this pin on the falling edges of
the SCLK pin.
Digital data input. The ADC108S022's Control Register is loaded through this pin on rising
edges of the SCLK pin.
Chip select. On the falling edge of CS, a conversion process begins. Conversions
continue as long as CS is held low.
Positive analog supply pin. This voltage is also used as the reference voltage. This pin
should be connected to a quiet +2.7V to +5.25V source and bypassed to GND with 1 µF
and 0.1 µF monolithic ceramic capacitors located within 1 cm of the power pin.
Positive digital supply pin. This pin should be connected to a +2.7V to V
bypassed to GND with a 0.1 µF monolithic ceramic capacitor located within 1 cm of the
power pin.
The ground return for the analog supply and signals.
The ground return for the digital supply and signals.
2
Description
20164507
REF
.
A
supply, and

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