DS2415P+ Maxim Integrated Products, DS2415P+ Datasheet - Page 8

IC TIME CHIP 1-WIRE 6-TSOC

DS2415P+

Manufacturer Part Number
DS2415P+
Description
IC TIME CHIP 1-WIRE 6-TSOC
Manufacturer
Maxim Integrated Products
Type
Time Chipr
Datasheet

Specifications of DS2415P+

Time Format
Binary
Date Format
Binary
Interface
1-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
6-TSOC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
DS2415
INITIALIZATION
All transactions on the 1-ire bus begin with an initialization sequence. The initialization sequence consists
of a Reset Pulse transmitted by the bus master followed by Presence Pulse(s) transmitted by the slave(s).
The Presence Pulse lets the bus master know that the DS2415 is on the bus and is ready to operate. For
more details, see the “1-Wire Signaling” section.
ROM FUNCTION COMMANDS
Once the bus master has detected a presence, it can issue one of the four ROM function commands. All
ROM function commands are 8 bits long. A list of these commands follows (refer to flowchart in
Figure 7):
Read ROM [33h]
This command allows the bus master to read the DS2415’s 8-bit family code, unique 48-bit serial
number, and 8-bit CRC. This command can only be used if there is a single DS2415 on the bus. If more
than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same
time (open drain will produce a wired-AND result). The resultant family code and 48-bit serial number
will usually result in a mismatch of the CRC.
Match ROM [55h]
The Match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a
specific DS2415 on a multidrop bus. Only the DS2415 that exactly matches the 64-bit ROM sequence
will respond to the following clock function command. All slaves that do not match the 64-bit ROM
sequence will wait for a Reset Pulse. This command can be used with a single or multiple devices on the
bus.
Skip ROM [CCh]
This command can save time in a single drop bus system by allowing the bus master to access the
memory functions without providing the 64-bit ROM code. If more than one slave is present on the bus
and a read command is issued following the Skip ROM command, data collision will occur on the bus as
multiple slaves transmit simultaneously (open drain pulldowns will produce a wired-AND result).
Search ROM [F0h]
When a system is initially brought up, the bus master might not know the number of devices on the 1-
Wire bus or their 64-bit ROM codes. The Search ROM command allows the bus master to use a process
of elimination to identify the 64-bit ROM codes of all slave devices on the bus. The Search ROM process
is the repetition of a simple, three-step routine: read a bit, read the complement of the bit, then write the
desired value of that bit. The bus master performs this simple, three-step routine on each bit of the ROM.
After one complete pass, the bus master knows the contents of the ROM in one device. The remaining
number of devices and their ROM codes may be identified by additional passes. See Chapter 5 of the
Book of DS19xx iButton Standards for a comprehensive discussion of a search ROM, including an actual
example.
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