ISL12020MIRZ Intersil, ISL12020MIRZ Datasheet - Page 7

• Manufacturer Part Number: ISL12020MIRZ
• Description: IC RTC/CALENDAR TEMP SNSR 20-DFN
• Manufacturer: Intersil
• Type: Clock/Calendarr

Specifications of ISL12020MIRZ

• Memory Size: 1K (128 x 8)
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

I2C Interface Specifications
NOTES:
10. Minimum V
11. Temperature Conversion is inactive below V
12. IRQ/F
13. V
14. In order to ensure proper timekeeping, the V
15. Limits should be considered typical and are not production tested.
16. These are I
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits
9. Specified at +25°C.
SYMBOL
t
t
t
t
t
established by characterization and are not production tested.
to validate specification.
HD:STO
HD:STA
SU:DAT
HD:DAT
SU:STO
R
DD
t
Cb
t
DH
t
PU
R
F
> V
OUT
BAT
Inactive.
DD
2
START Condition Hold Time
Input Data Setup Time
Input Data Hold Time
STOP Condition Setup Time
STOP Condition Hold Time
Output Data Hold Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Capacitive Loading of SDA or
SCL
SDA and SCL Bus Pull-up
Resistor Off-chip
C specific parameters and are not tested, however, they are used to set conditions for testing devices
+V
and/or V
BATHYS
PARAMETER
BAT
7
of 1V to sustain the SRAM. The value is based on characterization and it is not tested.
Test Conditions: V
specified. Boldface limits apply over the operating temperature range,
-40°C to +85°C. (Continued)
From SDA falling edge
crossing 30% of V
SCL falling edge
crossing 70% of V
From SDA exiting the
30% to 70% of V
window, to SCL rising
edge crossing 30% of
V
crossing 30% of V
SDA entering the 30%
to 70% of V
From SCL rising edge
crossing 70% of V
SDA rising edge
crossing 30% of V
From SDA rising edge to
SCL falling edge. Both
crossing 70% of V
From SCL falling edge
crossing 30% of V
until SDA enters the
30% to 70% of V
window.
V
V
Total on-chip and
off-chip
Maximum is determined
by t
For Cb = 400pF, max is
about 2kΩ~2.5kΩ.
For Cb = 40pF, max is
about 15kΩ~20kΩ
From SCL falling edge
From 30% to 70% of
From 70% to 30% of
BAT
DD.
DD.
DD.
TEST CONDITIONS
DD SR-
R
= 2.7V. Device operation is not guaranteed at VBAT<1.8V.
and t
ISL12020M
specification must be followed.
F
DD
.
DD
= +2.7 to +5.5V, Temperature = -40°C to +85°C, unless otherwise
window.
DD
DD
DD
DD
DD
DD
DD
DD
DD
, to
.
.
.
,
to
to
20 + 0.1 x
20 + 0.1 x
(Note 8)
MIN
600
100
600
600
20
Cb
Cb
10
0
1
(Note 9)
TYP
(Note 8) UNITS
MAX
900
300
300
400
kΩ
pF
ns
ns
ns
ns
ns
ns
ns
ns
February 11, 2010
NOTES
FN6667.4
16
16
16
16