M41T00M6F STMicroelectronics, M41T00M6F Datasheet - Page 15

• Manufacturer Part Number: M41T00M6F
• Description: IC RTC SRL 512KBIT 8SOIC
• Manufacturer: STMicroelectronics
• Type: Clock/Calendar/NVSRAMr

Specifications of M41T00M6F

• Memory Size: 8B
• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Function: Clock/Calendar/Battery Backup
• Rtc Memory Size: 8 Byte
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (2-Wire, I2C)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4697-2

3.1
Table 5.
1. Keys:
2. When CEB is set to '1', CB will toggle from '0' to '1' or from '1' to '0' at the turn of the century (dependent
Clock calibration
The M41T00 is driven by a quartz controlled oscillator with a nominal frequency of
32768 Hz. The devices are tested not to exceed 35 ppm (parts per million) oscillator
frequency error at 25°C, which equates to about ±1.53 minutes per month. With the
calibration bits properly set, the accuracy of each M41T00 improves to better than ±2 ppm
at 25 °C.
The oscillation rate of any crystal changes with temperature (see
chips compensate for crystal frequency and temperature shift error with cumbersome trim
capacitors. The M41T00 design, however, employs periodic counter correction. The
calibration circuit adds or subtracts counts from the oscillator divider circuit at the divide by
256 stage, as shown in
negative calibration) or split (added, positive calibration) depends upon the value loaded into
the five-bit calibration byte found in the control register. Adding counts speeds the clock up,
subtracting counts slows the clock down.
The calibration byte occupies the five lower order bits (D4-D0) in the control register (addr
7). This byte can be set to represent any value between 0 and 31 in binary form. Bit D5 is a
sign bit; '1' indicates positive calibration, '0' indicates negative calibration. Calibration occurs
within a 64minute cycle. The first 62 minutes in the cycle may, once per minute, have one
second either shortened by 128 or lengthened by 256 oscillator cycles. If a binary '1' is
loaded into the register, only the first 2 minutes in the 64 minute cycle will be modified; if a
binary 6 is loaded, the first 12 will be affected, and so on.
Address
S = sign bit
FT = frequency test bit
ST = stop bit
OUT = output level
X = don’t care
CEB = century enable bit
CB = century bit
upon the initial value set).When CEB is set to '0', CB will not toggle.
0
1
2
3
4
5
6
7
CEB
OUT
Register map
D7
ST
X
X
X
X
(2)
CB
D6
FT
10 Years
X
X
X
10 seconds
10 minutes
Figure
D5
(1)
X
X
S
10 hours
10 date
13. The number of times pulses are blanked (subtracted,
10 M.
D4
X
Data
D3
X
Calibration
D2
Seconds
Minutes
Month
Hours
Years
Date
Day
D1
D0
Figure
Century/hours
Seconds
Minutes
Control
Month
Date
Year
Day
Function/range
12). Most clock
BCD format
0-1/00-23
00-59
00-59
01-07
01-31
01-12
00-99
15/25