SI5326C-B-GM Silicon Laboratories Inc, SI5326C-B-GM Datasheet - Page 10

• Manufacturer Part Number: SI5326C-B-GM
• Description: IC ANY-RATE MULTI/ATTEN 36QFN
• Manufacturer: Silicon Laboratories Inc
• Type: Clock Multiplierr

Specifications of SI5326C-B-GM

• Number Of Circuits: 1
• Package / Case: 36-QFN
• Pll: Yes
• Input: Clock
• Output: CML, CMOS, LVDS, LVPECL
• Ratio - Input:output: 2:2
• Differential - Input:output: Yes/Yes
• Frequency - Max: 346MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 1.62 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Frequency-max: 346MHz
• Maximum Input Frequency: 710 MHz
• Minimum Input Frequency: 0.002 MHz
• Output Frequency Range: 0.002 MHz to 1400 MHz
• Supply Voltage (max): 3.63 V
• Supply Voltage (min): 1.71 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.8 V, 2.5 V, 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si5326
10
Note: Internal register names are indicated by underlined italics, e.g. INT_PIN. See Si5326 Register Map.
GND PAD
Pin #
23
25
24
26
27
29
28
34
35
36
SDA_SDO
CKOUT1–
CKOUT1+
CKOUT2–
CKOUT2+
Pin Name
CMODE
A2_SS
GND
SDI
A1
A0
GND
I/O
I/O
O
O
I
I
I
I
Signal Level
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
Supply
Multi
Multi
Confidential Rev. 0.2
Serial Data.
In I
tional serial data port.
In SPI control mode (CMODE = 1), this pin functions as the serial
data output.
Serial Port Address.
In I
ware controlled address bits.
In SPI control mode (CMODE = 1), these pins are ignored.
Serial Port Address/Slave Select.
In I
controlled address bit.
In SPI control mode (CMODE = 1), this pin functions as the slave
select input.
Serial Data In.
In I
In SPI control mode (CMODE = 1), this pin functions as the serial
data input.
Output Clock 1.
Differential output clock with a frequency range of 10 MHz to
1.4175 GHz. Output signal format is selected by SFOUT1_REG
register bits. Output is differential for LVPECL, LVDS, and CML
compatible modes. For CMOS format, both output pins drive iden-
tical single-ended clock outputs.
Output Clock 2.
Differential output clock with a frequency range of 10 MHz to
1.4175 GHz. Output signal format is selected by SFOUT2_REG
register bits. Output is differential for LVPECL, LVDS, and CML
compatible modes. For CMOS format, both output pins drive iden-
tical single-ended clock outputs.
Control Mode.
Selects I
0 = I
1 = SPI Control Mode
Ground Pad.
The ground pad must provide a low thermal and electrical
impedance to a ground plane.
2
2
2
2
C control mode (CMODE = 0), this pin functions as a hardware
C control mode (CMODE = 0), this pin functions as the bidirec-
C control mode (CMODE = 0), these pins function as hard-
C control mode (CMODE = 0), this pin is ignored.
2
C Control Mode
2
C or SPI control mode for the Si5326.
Description