MC88915FN70R2 Freescale Semiconductor, MC88915FN70R2 Datasheet - Page 10

• Manufacturer Part Number: MC88915FN70R2
• Description: IC DRIVER CLK PLL 70MHZ 28-PLCC
• Manufacturer: Freescale Semiconductor
• Type: Clock Driver, Fanout Distribution, Multiplexerr

Specifications of MC88915FN70R2

• Pll: Yes
• Input: TTL
• Output: CMOS, TTL
• Number Of Circuits: 1
• Ratio - Input:output: 3:8
• Differential - Input:output: No/No
• Frequency - Max: 70MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-PLCC
• Frequency-max: 70MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: MC88915FN70R2TR

MC88915
MOTOROLA
1. Figure 6 shows a loop filter and analog isolation scheme
1a.All loop filter and analog isolation components should be
1b.The 47
which will be effective in most applications. The following
guidelines should be followed to ensure stable and
jitter–free operation:
tied as close to the package as possible. Stray current
passing through the parasitics of long traces can cause
undesirable voltage transients at the RC1 pin.
capacitor, and the 0.1 F high frequency bypass capacitor
form a wide bandwidth filter that will minimize the 88915’s
sensitivity to voltage transients from the system digital
V CC supply and ground planes. This filter will typically
ensure that a 100mV step deviation on the digital V CC
supply will cause no more than a 100pS phase deviation
on the 88915 outputs. A 250mV step deviation on V CC
using the recommended filter values should cause no
more than a 250pS phase deviation; if a 25 F bypass
capacitor is used (instead of 10 F) a 250mV V CC step
should cause no more than a 100pS phase deviation.
If good bypass techniques are used on a board design
near components which may cause digital V CC and
ground noise, the above described V CC step deviations
should not occur at the 88915’s digital V CC supply. The
purpose of the bypass filtering scheme shown in Figure 6
resistors, the 10 F low frequency bypass
Figure 6. Recommended Loop Filter and Analog Isolation Scheme for the MC88915
FREQ BYPASS
10 F LOW
Notes Concerning Loop Filter and Board Layout Issues
0.1 F HIGH
BYPASS
FREQ
470K
47
47
BOARD GND
BOARD V CC
10
0.1 F (LOOP
FILTER CAP)
330
1c.There are no special requirements set forth for the loop
1d.The 470K reference resistor injects current into the
2. In addition to the bypass capacitors used in the analog
A SEPARATE ANALOG POWER SUPPLY IS NOT NECESSARY AND
SHOULD NOT BE USED. FOLLOWING THESE PRESCRIBED GUIDELINES
IS ALL THAT IS NECESSARY TO USE THE MC88915 IN A NORMAL DIGITAL
ENVIRONMENT.
is to give the 88915 additional protection from the power
supply and ground plane transients that can occur in a
high frequency, high speed digital system.
filter resistors (470K and 330 ). The loop filter capacitor
(0.1 F) can be a ceramic chip capacitior, the same as a
standard bypass capacitor.
internal charge pump of the PLL, causing a fixed offset
between the outputs and the SYNC input. This also
prevents excessive jitter caused by inherent PLL
dead–band. If the VCO (2X_Q output) is running above
40MHz, the 470K resistor provides the correct amount of
current injection into the charge pump (2–3 A). If the
VCO is running below 40MHz, a 1M reference resistor
should be used (instead of 470K).
filter of Figure 6, there should be a 0.1 F bypass
capacitor between each of the other (digital) four V CC pins
and the board ground plane. This will reduce output
switching noise caused by the 88915 outputs, in addition
to reducing potential for noise in the ‘analog’ section of the
chip. These bypass capacitors should also be tied as
close to the 88915 package as possible.
10
8
9
ANALOG V CC
RC1
ANALOG GND
ANALOG LOOP FILTER/VCO
SECTION OF THE MC88915
28–PIN PLCC PACKAGE (NOT
DRAWN TO SCALE)
TIMING SOLUTIONS
BR1333 — Rev 6