SI5364-F-BC Silicon Laboratories Inc, SI5364-F-BC Datasheet - Page 12

IC PREC PORT CARD CLOCK 99CBGA

SI5364-F-BC

Manufacturer Part Number
SI5364-F-BC
Description
IC PREC PORT CARD CLOCK 99CBGA
Manufacturer
Silicon Laboratories Inc
Type
Clock Generatorr
Datasheet

Specifications of SI5364-F-BC

Package / Case
99-CBGA
Pll
Yes
Input
Clock
Output
CML
Number Of Circuits
1
Ratio - Input:output
3:4
Differential - Input:output
Yes/Yes
Frequency - Max
675MHz
Divider/multiplier
No/Yes
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
675MHz
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
336-1145

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI5364-F-BC
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Table 4. AC Characteristics (PLL Performance Characteristics) (Continued)
(V
Si5364
12
CLKOUT Peak-Peak Jitter Generation
FEC[1:0] = 01, 10 (255/238, 238/255 scal-
ing)
Jitter Transfer Bandwidth (see Figure 9)
Wander/Jitter Transfer Peaking
Acquisition Time
Clock Output Wander with
Temperature Gradient
Initial Frequency Accuracy in Digital Hold
Mode (first 100 ms with supply voltage and
temperature held constant)
Clock Output Frequency Accuracy Over
Temperature in Digital Hold Mode
Clock Output Frequency Accuracy Over
Supply Voltage in Digital Hold Mode
Clock Output Phase Step
Clock Output Phase Step Slope
Switches
BWSEL[1:0] = 11
BWSEL[1:0] = 00
BWSEL[1:0] = 01
BWSEL[1:0] = 10
Notes:
DD33
1. Higher PLL bandwidth settings provide smaller clock output wander with temperature gradient.
2. For reliable device operation, temperature gradients should be limited to 10 °C/min.
3. Telcordia GR-1244-CORE requirements specify maximum phase transient slope during clock rearrangement in terms
= 3.3 V ± 5%, TA = –20 to 85 °C)
of nanoseconds per millisecond. The equivalent ps/ µ s unit is used here since the maximum phase transient magnitude
for the Si5364 (t
Parameter
PT_MTIE
1,2
) never reaches one nanosecond.
3
—Manual
J
Symbol
C
t
C
C
PT_MTIE
GEN(PP)
C
DH_V33
CO_TG
F
DH_FA
m
T
DH_T
J
BW
AQ
PT
P
Rev. 2.2
clock input and VALTIME = 0
CAL_ACTV low, with valid
Constant Supply Voltage
During Clock Switching
During Clock Switching
Selected until entering
Constant Temperature
Gradient < 10 °C/min;
Stable Input Clock;
RSTN/CAL high to
Stable Input Clock
12 kHz to 20 MHz
50 kHz to 80 MHz
800 Hz Loop BW
Test Condition
BW = 6400 Hz
Temperature
Digital Hold
< 6400 Hz
3,200 Hz
6400 Hz
1600 Hz
800 Hz
1/1
–200
Min
6400
0.05
16.2
Typ
195
7.1
3.0
25
0
Max Unit
12.0
1.25
350
500
200
5.5
7.0
2.5
40
30
10
.1
5
ppm
ppm
ppm
min
°C/
/°C
Hz
dB
ms
ps/
ps/
ps
ps
ps
µs
/V

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