STW81100AT-1 STMicroelectronics, STW81100AT-1 Datasheet - Page 21

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STW81100AT-1

Manufacturer Part Number
STW81100AT-1
Description
IC SYNTHESIZER MULTI RF 28VFQFPN
Manufacturer
STMicroelectronics
Type
Frequency Synthesizerr
Datasheet

Specifications of STW81100AT-1

Pll
Yes
Input
Clock, Crystal
Output
Clock, Crystal
Number Of Circuits
1
Ratio - Input:output
3:2
Differential - Input:output
No/No
Frequency - Max
4.4GHz
Divider/multiplier
Yes/No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-VFQFN, 28-VFQFPN
Frequency-max
4.4GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STW81100AT-1
Manufacturer:
STMicroelectronics
Quantity:
10 000
Table 24. READ-ONLY REGISTER
This register is automatically addressed in the ‘current byte address read mode’.
ILLEGAL_SUBADD: gives “1” if the sub-address value is not correct
ENDCALB: at “0” means end of auto-calibration phase
LOCK_DET: “1” when PLL is locked
INTCAL[4:0]: internal value of the VCO control word
9
The STW81100 features three different alternatively selectable bands: direct output (3.3 to 4.4GHz), di-
vided by 2 (1.65 to 2.2GHz) and divided by 4 (850 to 1100MHz). In order to achieve a suitable power level,
a good matching network is needed to adapt the output stage to a 50Ω load. Moreover, since most of com-
mercial RF components have single ended input and output terminations, a differential to single ended
conversion could be required.
Below different matching configurations for the three bands are suggested as a guideline for the customer
to design its own application board.
9.1 Direct output
If a differential to single conversion is not needed it is possible to match the output buffer of the STW81100
in the simple way shown in
Figure 23. Differential/single ended output network in the 3.3 - 4.4GHz range
Since most of discrete components for microwave applications are single ended, the user can easily use
one of the two outputs and terminate the other one to 50Ω with a 3dB power loss.
Alternatively it is possible to combine the 2 outputs in different ways. A first topology for the direct output
(3.3GHz to 4.4GHz) is suggested in
network to adapt the output to a 50Ω load. The two LC networks shift output signal phase of -90° and +90°
thus combining the 2 outputs. The LC balun is designed for a center frequency of 4GHz and exhibits ap-
AL_SUBAD0
ILLEG
MSB
Application Information
b7
END CALB
b6
Figure 23
LOCK_DET
R F
R F
b5
O U T P
O U T N
Figure 24
5 0 O h m
.
50 O h m
INT CAL4
V
V
. It basically consists of a simple LC balun and a matching
C C
C C
b4
2n H
2n H
1 0p F
1 0p F
INT CAL3
b3
INT CAL2
5 0 O hm
5 0 O hm
b2
INT CAL1
b1
STW81100
INT CAL0
LSB
b0
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