STW81100AT-1 STMicroelectronics, STW81100AT-1 Datasheet - Page 17

• Manufacturer Part Number: STW81100AT-1
• Description: IC SYNTHESIZER MULTI RF 28VFQFPN
• Manufacturer: STMicroelectronics
• Type: Frequency Synthesizerr

Specifications of STW81100AT-1

• Pll: Yes
• Input: Clock, Crystal
• Output: Clock, Crystal
• Number Of Circuits: 1
• Ratio - Input:output: 3:2
• Differential - Input:output: No/No
• Frequency - Max: 4.4GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-VFQFN, 28-VFQFPN
• Frequency-max: 4.4GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 10.
8.1.8 Multi-byte write mode
The multi-byte write mode can start from any internal address. The master sends the data bytes and each
one is acknowledged. The master terminates the transfer by generating a STOP condition.
The sub-address decides the starting byte. A Multi-byte with sub-address 01H and 2 DATA_IN bytes will
change the “B_COUNTER” and “A_COUNTER” registers, so a Multi-byte with sub-address 00H and 6
DATA_IN bytes will change all the STW81100 registers.
Table 11.
8.1.9 Current Byte Address Read
In the current byte address read mode, following a START condition, the master sends the device address
with the rw bit set to 1 (No sub-address is needed as there is only 1 byte read register). The STW81100
acknowledges this and outputs the data byte. The master does not acknowledge the received byte, but
terminates the transfer with a STOP condition.
Table 12.
8.2 Timing Specification
Figure 20. Data and clock
Table 13.
S
S
S
Symbol
1100A
T
T
T
T
cwh
cwl
cs
ch
1100A
2
1100 A
A
1
2
A
A
0
1
A
2
0
A
0
1
A
0
ack
SDA
SDA
SCL
SCL
0
Data to clock set up time
Data to clock hold time
Clock pulse width high
Clock pulse width low
sub-address byte
ack
1
Parameter
t
t
cs
cs
ack
sub-address byte
t
t
t
t
ch
ch
cwl
cwl
ack
t
t
cwh
cwh
DATA IN
DATA
ack
ack
Minimum time (ns)
....
DATA IN
DATA IN
10
2
2
5
No ack
STW81100
ack
ack
P
17/29
P
P