FS6377-01G-XTP ON Semiconductor, FS6377-01G-XTP Datasheet - Page 23

no-image

FS6377-01G-XTP

Manufacturer Part Number
FS6377-01G-XTP
Description
IC CLOCK GEN PLL PROG 16SOIC
Manufacturer
ON Semiconductor
Type
PLL Clock Generatorr
Datasheet

Specifications of FS6377-01G-XTP

Pll
Yes
Input
Crystal
Output
CMOS
Number Of Circuits
1
Ratio - Input:output
1:4
Differential - Input:output
No/No
Frequency - Max
230MHz
Divider/multiplier
Yes/No
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Frequency-max
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
FS6377
Figure 15: PLL Screen
For a 100MHz output, the VCO should ideally operate at a higher frequency, and the reference and feedback dividers should be as
small as possible. In this example, highlight Solution #7. Notice the VCO operates at 200MHz with a post divider of two to obtain an
optimal 50 percent duty cycle.
Now choose which mux and post divider to use (that is, choose an output pin for the 100MHz output). Selecting A places the PostDiv
value in Solution #7 into post divider A and switches mux A to take the output of PLL A.
The PLL screen should disappear, and now the value in the PLL A box is the new VCO frequency chosen in Solution #7. Also note that
mux A has been switched to PLL A and the post divider A has the chosen 100MHz output displayed.
Repeat the steps for PLL B.
PLL C supports two different output frequencies depending on the setting of the SEL_CD pin. Both mux C and mux D are also affected
by the logic level on the SEL_CD pin, as are the post dividers C and D.
Figure 16: Post Divider Menu
Rev. 4 | Page 23 of 24 | www.onsemi.com

Related parts for FS6377-01G-XTP