IDT8737-11PGGI IDT, Integrated Device Technology Inc, IDT8737-11PGGI Datasheet - Page 10

• Manufacturer Part Number: IDT8737-11PGGI
• Description: IC CLK GEN DIFF-LVPECL 20-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Fanout Buffer (Distribution), Divider, Multiplexerr

Specifications of IDT8737-11PGGI

• Number Of Circuits: 1
• Ratio - Input:output: 2:4
• Differential - Input:output: Yes/Yes
• Input: CML, HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVPECL
• Frequency - Max: 650MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Frequency-max: 650MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 8737-11PGGI

POWER DISSIPATION:
for the V
power dissipated in the load.
JUNCTION TEMPERATURE:
recommended junction temperature for this device is 125°C.
linear feet per minute and a multi-layer board, the appropriate value is 77.6°C/W per the following Thermal Resistance table. Therefore, t
temperature of 85°C with all its outputs switching is:
layer or multi-layer).
THERMAL RESISTANCE
θ
POWER CONSIDERATIONS
IDT8737-11
LOW SKEW, ÷ ÷ ÷ ÷ ÷ 1/÷ ÷ ÷ ÷ ÷ 2 DIFFERENTIAL-TO-3.3V LVPECL
JA
This section provides information on power dissipation and junction temperature for the IDT8737-11. Equations and example calculations are also provided.
The total power dissipation for the IDT8737-11 is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 4 * 30.2mW = 120.8mW
Total Power_
Junction temperature (t
The equation for is as follows: t
t
θ
Pd_total = Total Device Power Dissipation (example calculation is in Power Dissipation, above)
T
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance (θ
85°C + 0.311W * 77.6°C/W = 109.16°C. This is well below the limit of 125°C.
This calculation is only an example. t
J
JA
A
for 20-pin TSSOP, forced convection
= Junction Temperature
Multi-Layer PCB, JEDEC Standard Test boards
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
DD
= 3.3V + 5% = 3.465V, which gives worst case results. Please refer to the following section, Calculations and Equations, for details on calculating
MAX
MAX
MAX
= V
(3.465V, with all outputs switching) = 190.57mW + 120.8mW = 311.37mW
= 30.2mW/Loaded Output Pair
DD
_
J
MAX
) is the temperature at the junction of the bond wire and bond pad. It directly affects the reliability of the device. The maximum
* I
CC
J
= θ
_
MAX
JA
J
will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and the type of board (single-
* Pd_total + T
= 3.465 * 55mA = 190.57mW
A
θ θ θ θ θ
JA
by Velocity (Linear Feet per mInute)
10
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
92.6
0
JA
) must be used. Assuming a moderate air flow of 200
77.6
200
70.9
400
J
for an ambient
°C/W
Unit