AD9516-0BCPZ Analog Devices Inc, AD9516-0BCPZ Datasheet - Page 79
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AD9516-0BCPZ
Manufacturer Part Number
AD9516-0BCPZ
Description
IC CLOCK GEN 2.8GHZ VCO 64-LFCSP
Manufacturer
Analog Devices Inc
Type
Clock Generator, Fanout Distributionr
Datasheet
1.AD9516-0BCPZ-REEL7.pdf
(80 pages)
Specifications of AD9516-0BCPZ
Pll
Yes
Input
Clock
Output
CMOS, LVDS, LVPECL
Number Of Circuits
1
Ratio - Input:output
1:14
Differential - Input:output
Yes/Yes
Frequency - Max
2.95GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Frequency-max
2.95GHz
Clock Ic Type
Clock Generator
Ic Interface Type
Serial
Frequency
2.8GHz
No. Of Outputs
14
No. Of Multipliers / Dividers
32
Supply Voltage Range
3.135V To 3.465V
Digital Ic Case Style
LFCSP
Function
Clock Generator
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
LFCSP EP
Pin Count
64
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD9516-0BCPZ
Manufacturer:
AD
Quantity:
3 340
Part Number:
AD9516-0BCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
CMOS CLOCK DISTRIBUTION
The AD9516 provides four clock outputs (OUT6 to OUT9)
that are selectable as either CMOS or LVDS level outputs.
When selected as CMOS, each output becomes a pair of CMOS
outputs, each of which can be individually turned on or off and
set as noninverting or inverting. These outputs are 3.3 V CMOS
compatible.
Whenever single-ended CMOS clocking is used, some of the
following general guidelines should be used.
Point-to-point nets should be designed such that a driver has
only one receiver on the net, if possible. This allows for simple
termination schemes and minimizes ringing due to possible
mismatched impedances on the net. Series termination at the
source is generally required to provide transmission line
matching and/or to reduce current transients at the driver.
The value of the resistor is dependent on the board design and
timing requirements (typically 10 Ω to 100 Ω is used). CMOS
outputs are also limited in terms of the capacitive load or trace
length that they can drive. Typically, trace lengths less than
3 inches are recommended to preserve signal rise/fall times and
preserve signal integrity.
Figure 75. Series Termination of CMOS Output
CMOS
10Ω
MICROSTRIP
(1.0 INCH)
60.4Ω
CMOS
Rev. A | Page 79 of 80
Termination at the far-end of the PCB trace is a second option.
The CMOS outputs of the AD9516 do not supply enough
current to provide a full voltage swing with a low impedance
resistive, far-end termination, as shown in Figure 76. The far-
end termination network should match the PCB trace impedance
and provide the desired switching point. The reduced signal
swing may still meet receiver input requirements in some
applications. This can be useful when driving long trace
lengths on less critical nets.
Because of the limitations of single-ended CMOS clocking,
consider using differential outputs when driving high speed
signals over long traces. The AD9516 offers both LVPECL and
LVDS outputs that are better suited for driving long traces
where the inherent noise immunity of differential signaling
provides superior performance for clocking converters.
Figure 76. CMOS Output with Far-End Termination
CMOS
10Ω
50Ω
VS
100Ω
100Ω
CMOS
AD9516-0