AD9516-0BCPZ Analog Devices Inc, AD9516-0BCPZ Datasheet - Page 72

IC CLOCK GEN 2.8GHZ VCO 64-LFCSP

AD9516-0BCPZ

Manufacturer Part Number
AD9516-0BCPZ
Description
IC CLOCK GEN 2.8GHZ VCO 64-LFCSP
Manufacturer
Analog Devices Inc
Type
Clock Generator, Fanout Distributionr
Datasheet

Specifications of AD9516-0BCPZ

Pll
Yes
Input
Clock
Output
CMOS, LVDS, LVPECL
Number Of Circuits
1
Ratio - Input:output
1:14
Differential - Input:output
Yes/Yes
Frequency - Max
2.95GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Frequency-max
2.95GHz
Clock Ic Type
Clock Generator
Ic Interface Type
Serial
Frequency
2.8GHz
No. Of Outputs
14
No. Of Multipliers / Dividers
32
Supply Voltage Range
3.135V To 3.465V
Digital Ic Case Style
LFCSP
Function
Clock Generator
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
LFCSP EP
Pin Count
64
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD9516-0
Reg.
Addr.
(Hex)
0x141
0x142
0x143
Bits
0
[7:5]
4
3
[2:1]
0
[7:5]
4
3
Name
OUT7 power-down
OUT8 output polarity
OUT8 CMOS B
OUT8 select LVDS/CMOS
OUT8 LVDS output current
OUT8 power-down
OUT9 output polarity
OUT9 CMOS B
OUT9 select LVDS/CMOS
Description
Power-down output (LVDS/CMOS).
0: power on.
1: power off (default).
In CMOS mode, Bits[7:5] select the output polarity of each CMOS output.
In LVDS mode, only Bit 5 determines LVDS polarity.
7
0
0
1
1
0
0
1
1
In CMOS mode, turns on/off the CMOS B output. There is no effect in LVDS mode.
0: turn off the CMOS B output (default).
1: turn on the CMOS B output.
Selects LVDS or CMOS logic levels.
0: LVDS (default).
1: CMOS.
Sets output current level in LVDS mode. This has no effect in CMOS mode.
2
0
0
1
1
Power-down output (LVDS/CMOS).
0: power on.
1: power off (default).
In CMOS mode, Bits[7:5] select the output polarity of each CMOS output.
In LVDS mode, only Bit 5 determines LVDS polarity.
7
0
0
1
1
0
0
1
1
In CMOS mode, turns on/off the CMOS B output. There is no effect in LVDS mode.
0: turn off the CMOS B output (default).
1: turn on the CMOS B output.
Selects LVDS or CMOS logic levels.
0: LVDS (default).
1: CMOS.
6
0
1
0
1
0
1
0
1
1
0
1
0
1
6
0
1
0
1
0
1
0
1
Rev. A | Page 72 of 80
5
0
0
0
0
1
1
1
1
Current (mA)
1.75
3.5
5.25
7
5
0
0
0
0
1
1
1
1
OUT6A (CMOS)
Noninverting
Noninverting
Inverting
Inverting
Inverting
Inverting
Noninverting
Noninverting
OUT7A (CMOS)
Noninverting
Noninverting
Inverting
Inverting
Inverting
Inverting
Noninverting
Noninverting
OUT6B (CMOS)
Inverting
Noninverting
Inverting
Noninverting
Noninverting
Inverting
Noninverting
Inverting
Recommended Termination (Ω)
100
100 (default)
50
50
OUT7B (CMOS)
Inverting
Noninverting
Inverting
Noninverting
Noninverting
Inverting
Noninverting
Inverting
OUT6 (LVDS)
Noninverting
Noninverting (default)
Noninverting
Noninverting
Inverting
Inverting
Inverting
Inverting
OUT7 (LVDS)
Noninverting
Noninverting (default)
Noninverting
Noninverting
Inverting
Inverting
Inverting
Inverting

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