AD9516-0BCPZ Analog Devices Inc, AD9516-0BCPZ Datasheet - Page 55

• Manufacturer Part Number: AD9516-0BCPZ
• Description: IC CLOCK GEN 2.8GHZ VCO 64-LFCSP
• Manufacturer: Analog Devices Inc
• Type: Clock Generator, Fanout Distributionr

Specifications of AD9516-0BCPZ

• Pll: Yes
• Input: Clock
• Output: CMOS, LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 1:14
• Differential - Input:output: Yes/Yes
• Frequency - Max: 2.95GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Frequency-max: 2.95GHz
• Clock Ic Type: Clock Generator
• Ic Interface Type: Serial
• Frequency: 2.8GHz
• No. Of Outputs: 14
• No. Of Multipliers / Dividers: 32
• Supply Voltage Range: 3.135V To 3.465V
• Digital Ic Case Style: LFCSP
• Function: Clock Generator
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: LFCSP EP
• Pin Count: 64
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER MAP OVERVIEW
Table 52. Register Map Overview
Reg.
Addr.
(Hex)
Serial Port Configuration
0x000
0x001
0x002
0x003
0x004
PLL
0x010
0x011
0x012
0x013
0x014
0x015
0x016
0x017
0x018
0x019
0x01A
0x01B
0x01C
0x01D
0x01E
0x01F
0x020
to
0x04F
Parameter
Serial port
configuration
Part ID
Readback
control
PFD and
charge pump
R counter
A counter
B counter
PLL Control 1
PLL Control 2
PLL Control 3
PLL Control 4
PLL Control 5
PLL Control 6
PLL Control 7
PLL Control 8
PLL Control 9
PLL readback
Bit 7 (MSB)
SDO
active
PFD
polarity
Set CP pin
to V
Reserved
Reserved
VCO
frequency
monitor
Disable
switchover
deglitch
Reserved
R, A, B counters SYNC
CP
/2
pin reset
Blank
Blank
Bit 6
LSB first
Reset R
counter
Reference
frequency
monitor
threshold
REF2
( REFIN )
frequency
monitor
Select
REF2
VCO cal
finished
Reserved
Blank
Lock detect counter
Charge pump current
Bit 5
Soft reset
Reset A and
B counters
REF1 (REFIN)
frequency
monitor
Use
REF_SEL pin
Holdover
active
STATUS pin control
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Bit 4
Long
instruction
Reset all
counters
Digital lock
detect
window
Reserved
PLL status
register
disable
REF2
selected
13-bit B counter, Bits[7:0] (LSB)
R path delay
14-bit R divider, Bits[7:0] (LSB)
Blank
Part ID (read only)
Reserved
Blank
Blank
Reserved
14-bit R divider, Bits[13:8] (MSB)
Bit 3
Long
instruction
B counter
bypass
Disable
digital lock
detect
Reserved
LD pin
comparator
enable
VCO
frequency >
threshold
Charge pump mode
13-bit B counter, Bits[12:8] (MSB)
6-bit A counter
LD pin control
REFMON pin control
Soft reset
REF2
power-on
Holdover
enable
REF2
frequency >
threshold
Bit 2
VCO calibration divider
Bit 1
LSB first
REF1
power-on
External
holdover
control
REF1
frequency >
threshold
N path delay
Prescaler P
Antibacklash pulse width
PLL power-down
Bit 0 (LSB)
SDO active
Read back
active
registers
VCO cal now
Differential
reference
Holdover
enable
Digital
lock detect
AD9516-0
Default
Value
(Hex)
0x18
0x01
0x00
0x7D
0x01
0x00
0x00
0x03
0x00
0x06
0x00
0x06
0x00
0x00
0x00
0x00
0x00
0x00
N/A