MK1493-05GLFTR IDT, Integrated Device Technology Inc, MK1493-05GLFTR Datasheet - Page 4
![IC CLOCK DRIVER DIFF 16-TSSOP](/photos/6/53/65399/mk1493-05glftr_sml.jpg)
MK1493-05GLFTR
Manufacturer Part Number
MK1493-05GLFTR
Description
IC CLOCK DRIVER DIFF 16-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Buffer/Driverr
Datasheet
1.MK1493-05GTR.pdf
(14 pages)
Specifications of MK1493-05GLFTR
Input
Clock
Output
Clock
Frequency - Max
100MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Frequency-max
100MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1873-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK1493-05GLFTR
Manufacturer:
INTEGRATED
Quantity:
20 000
General SMBus Serial Interface
How to Write:
•
•
•
•
•
•
•
•
•
•
IDT™ DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
MK1493-05
DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
Controller (host) sends a start bit
Controller (host) sends the write address D4
IDT clock will acknowledge
Controller (host) sends the beginning byte location =N
IDT clock will acknowledge
Controller (host) sends the data byte count = X
IDT clock will acknowledge
Controller (host) starts sending Byte N through Byte N + X - 1
(see Note 2)
IDT clock will acknowledge each byte one at a time
Controller (host) sends a Stop bit
WR
Data Byte Count = X
Slave Address D4
Beginning Byte = N
Beginning Byte = N
T
P
Controller (Host)
Byte N + X - 1
Index Block Write Operation
O
O
O
starTbit
stoP bit
WRite
H)
X
B
Y
T
E
.
IDT (Slave/Receiver)
ACK
ACK
ACK
ACK
ACK
(H)
O
O
O
4
How to Read:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Controller (host) sends a start bit
Controller (host) sends the write address D4
IDT clock will acknowledge
Controller (host) sends the beginning byte location =N
IDT clock will acknowledge
Controller (host) will send a separate start bit
Controller (host) sends the read address D5
IDT clock will acknowledge
Controller (host) sends the data byte count = X
IDT clock sends Byte N + X - 1
IDT clock sends Byte 0 through byte X (if X
byte 8)
Controller (host) will need to acknowledge each byte
Controller (host) will send a not acknowledge bit
Controller (host) will send a stop bit
WR
RD
RT
N
P
T
Slave Address D4
Slave Address D5
Beginning Byte = N
Controller (Host)
Index Block Read Operation
Not acknowledge
ACK
ACK
Repeat starT
O
O
O
starTbit
stoP bit
ReaD
WRite
(H)
(H)
X
B
Y
T
E
.
IDT (Slave/Receiver)
MK1493-05
Data Bye Count = X
CLOCK SYNTHESIZER
Beginning Byte N
Byte N + X - 1
(H)
ACK
ACK
ACK
(H)
(H)
O
O
O
was written to
REV J 051310