MPC9448AC Freescale Semiconductor, MPC9448AC Datasheet - Page 4

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MPC9448AC

Manufacturer Part Number
MPC9448AC
Description
IC CLOCK FANOUT BUFF 1:12 32LQFP
Manufacturer
Freescale Semiconductor
Type
Fanout Buffer (Distribution), Multiplexerr
Datasheet

Specifications of MPC9448AC

Number Of Circuits
1
Ratio - Input:output
2:12
Differential - Input:output
Yes/No
Input
LVCMOS, LVPECL
Output
LVCMOS
Frequency - Max
350MHz
Voltage - Supply
2.375 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-LQFP
Frequency-max
350MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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MPC9448
a. AC characteristics apply for parallel output termination of 50 to V TT .
b. V CMR (AC) is the crosspoint of the differential input signal. Normal AC operation is obtained when the crosspoint is within the V CMR range
c. Violation of the 1.0 ns maximum input rise and fall time limit will affect the device propagation delay, device-to-device skew, reference input
d. Output pulse skew is the absolute difference of the propagation delay times: | t pLH - t pHL |.
a. V CMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the V CMR range
b. Input pull-up / pull-down resistors influence input current.
c. The MPC9448 is capable of driving 50 transmission lines on the incident edge. Each output drives one 50 parallel terminated
d. I CCQ is the DC current consumption of the device with all outputs open and the input in its default state or open.
Table 6. AC CHARACTERISTICS (V CC = 3.3V 5%, T A = –40 C to +85 C) a
Table 7. DC CHARACTERISTICS (V CC = 2.5V 5%, T A = –40 C to +85 C)
MOTOROLA
Symbol
V CMR a
t PLZ, HZ
t PLH/HL
t PLH/HL
t PZL, LZ
I CCQ d
Symbol
V CMR b
Z OUT
t P, REF
t sk(PP)
t SK(P)
V OH
t sk(O)
and the input swing lies within the V PP (AC) specification. Violation of V CMR or V PP impacts t PLH/HL and t SK(PP) .
pulse width, output duty cycle and maximum frequency specifications.
V PP
V OL
and the input swing lies within the V PP (DC) specification.
transmission line to a termination voltage of V TT . Alternatively, the device drives one 50 series terminated transmission lines at
VCC=2.5V.
f MAX
V IH
DC Q
V IL
V PP
I IN
t r , t f
t r , t f
f ref
t S
t H
Input high voltage
Input low voltage
Peak-to-peak input voltage
Common Mode Range
Input current b
Output High Voltage
Output Low Voltage
Output impedance
Maximum Quiescent Supply Current
Input Frequency
Maximum Output Frequency
Peak-to-peak input voltage
Common Mode Range
Reference Input Pulse Width
CCLK Input Rise/Fall Time
Propagation delay
Output Disable Time
Output Enable Time
Setup time
Hold time
Output-to-output Skew
Device-to-device Skew
Output pulse skew d
Output Duty Cycle
Output Rise/Fall Time
Characteristics
Characteristics
PCLK or CCLK to any Q
CCLK to CLK_STOP
CCLK to CLK_STOP
PCLK to CLK_STOP
PCLK to CLK_STOP
PCLK
PCLK
PCLK to any Q
CCLK to any Q
f Q <170 MHz
Using CCLK
Using PCLK
Min
-0.3
250
PCLK
PCLK
1.7
1.0
1.8
4
Min
400
1.3
1.4
1.6
1.3
0.0
0.0
1.0
1.5
0.1
45
0
0
Typ
19
Typ
50
V CC + 0.3
V CC -0.7
Max
300
0.7
0.6
2.0
V CC -0.8
1000
Max
1.0 c
350
350
150
300
400
3.6
3.3
2.0
1.0
11
11
55
Unit
mV
mA
W
V
V
V
V
V
A
Unit
MHz
MHz
mV
LVCMOS
LVCMOS
LVPECL
LVPECL
V IN =GND or V IN =VCC
I OH = -15 mA c
I OL = 15 mA c
All V CC Pins
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ns
ps
ps
ns
%
V
TIMING SOLUTIONS
Condition
LVPECL
LVPECL
0.8 to 2.0V
DC REF = 50%
0.55 to 2.4V
Condition

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