SI5315B-C-GMR Silicon Laboratories Inc, SI5315B-C-GMR Datasheet - Page 39

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SI5315B-C-GMR

Manufacturer Part Number
SI5315B-C-GMR
Description
IC CLOCK MULT 8KHZ-125MHZ 36QFN
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI5315B-C-GMR

Input
*
Output
*
Frequency - Max
*
Voltage - Supply
*
Operating Temperature
*
Mounting Type
Surface Mount
Package / Case
36-VQFN
Frequency-max
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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5.2. Output Clock Drivers
The Si5315 has a flexible output driver structure that can drive a variety of loads, including LVPECL, LVDS, CML,
and CMOS formats. The signal format is selected for both CKOUT1 and CKOUT2 outputs using the SFOUT [1:0]
pins. This modifies the output common mode and differential signal swing. See Table 2, “DC Characteristics” for
output driver specifications. The SFOUT [1:0] pins are three-level input pins, with the states designated as L
(ground), M (V
load being driven.
For the CMOS setting (SFOUT = LH), both output pins drive single-ended in-phase signals. The CKOUT+/- can be
externally shorted together for greater drive strength specified in Table 2, “DC Characteristics”.
Figure 15. Typical CMOS Output Circuit (Tie CKOUTn+ and CKOUTn– Together)
CKOUTn
DD
/2), and H (V
Si5315
Table 15. Output Signal Format Selection (SFOUT)
DD
Figure 14. Typical Differential Output Circuit
). Table 15 shows the signal formats based on the supply voltage and the type of
SFOUT[1:0]
Z0 = 50
CKOUTn
All Others
Z0 = 50
HM
MH
LM
ML
HL
LH
Si5315
Outputs Together for Greater Strength
Rev. 0.26
Low-swing LVDS
Optionally Tie CKOUTn
Signal Format
Reserved
Disabled
LVPECL
CMOS
LVDS
CML
CMOS
Logic
100
Rcvr
Si5315
39

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