IP4051CX11/LF,135 NXP Semiconductors, IP4051CX11/LF,135 Datasheet - Page 20

• Manufacturer Part Number: IP4051CX11/LF,135
• Description: IC EMI FILTER MMC ESD PROT 11CSP
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of IP4051CX11/LF,135

• Capacitance: 25pF
• Package / Case: 11-CSP
• Resistance (ohms): 47, 13K, 56K
• Resistance In Ohms: 47, 13K, 56K
• Channels: 4 Channels
• Termination Style: SMD/SMT
• Tolerance: -
• Power (watts): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Tolerance: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: /T3 934057926135 IP4051CX11/LF

NXP Semiconductors
AN10911_1
Application note
Fig 10. IP4051CX11/LF SD-memory card SPI mode interface schematic diagram
DO
SCLK
CS
DI
5.2.1 Application information of IP4051CX11/LF in an SPI mode SD-memory card
5.3 MMC ESD protection and EMI filter device IP4060CX16/LF
A3
B3
C3
D3
IP4051CX11
interface
In case a full 4-bit/8-bit memory card interface implementation on the host side is not
required or not possible (e.g. too high design-in effort), SD-memory cards/MMC offer an
SPI mode interface function. This interface type requires only four interface lines and uses
a single-bit physical data transmission with a maximum of 25 MHz clock frequency.
Please note that the SPI mode is no longer supported according JESD84-A43, MMC
version 4.3 specification. For details, please refer to chapter 9, 'SPI mode' of
A basic schematic diagram is depicted in
Resistor 'DO-pu' should be connected to V
present.
During power-up, CS (DAT3/CD) should be pulled high using resistor 'CS-pu' during the
first 74 clock cycles and pulled low via the host interface drivers while the card is receiving
a reset command (CMD0). This will initiate the SPI interface mode.
All unused SD-memory card pins (DAT1 and DAT3) should be pulled high using additional
resistors which are not shown here.
The IP4060CX16/LF is a 6-channel MMC device with 5 additionally integrated pull-up
resistors in a tiny 0.5 mm ball pitch CSP.
The only channel without a pull-up resistor is the clock channel (see schematic diagram in
Figure
detection method cannot be used. Detection using a mechanical switch is mandatory.
The maximum filter channel capacitance is 20 pF which makes the device suitable to work
in high clock speed applications, too.
47R
47R
47R
47R
11, pin B4 to pin A1). Due to the pull-up resistor implementation, the electrical card
D2
All information provided in this document is subject to legal disclaimers.
13k
56k
C2
C1
D1
B2
A2
B1
DO-pu
Rev. 01 — 29 April 2010
CS-pu
SD(HC)-memory card and MMC interface conditioning
DO
SCLK
DI
CS
Figure
CC
DAT1
DAT0
CLK
CMD
DAT3/CD
DAT2
in order to avoid bus floating while no card is
VCC(V
GND
10.
SD
)
pull-up
50k
SD Memory Card
AN10911
© NXP B.V. 2010. All rights reserved.
Ref.
2.
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