SAF82526NV2.2XT Infineon Technologies, SAF82526NV2.2XT Datasheet - Page 56

• Manufacturer Part Number: SAF82526NV2.2XT
• Manufacturer: Infineon Technologies

Specifications of SAF82526NV2.2XT

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Lead Free Status / RoHS Status: Compliant

Summary
The features of the different clock modes are summarized in table 6.
Table 6
Clock Modes of HSCX
Channel Configuration
Clock Mode
CCR1
CM2, CM1, CM0
Note: 1) The maximum data rate in an externally clocked operating mode is 4.1 Mbit/s. In an
0
1
2
2
3
4
4
5
6
6
6
7
7
Semiconductor Group
internally clocked operating mode with an external reference clock, or using the OSC,
the maximum clock rate is 12 MHz or 19.2 MHz if the scaling factor of the BRG is
programmed to 1. The maximum data rate will be 1200 kbit/s.
2) The ratio between the receive frequency (fr) and the transmit frequency (fx) for a
channel must satisfy the condition fr/fx less than 3 in clock modes 0, 2, 6; there are no
restrictions on the phase shift. Slower transmit data rates can be realized with receive
and transmit strobes (clock mode 1).
3) The clock modes 4, 6, 7 use the internal OSC and need an external quartz crystal to
be connected at the RxCLK A-AxCLK A pins.
It is not necessary to use two separate crystals for the two serial channels, instead it is
sufficient to apply the crystal to channel A and provide the reference clock for channel
B by externally connecting the AxCLKA and RxCLKB pins. The SAB 82526 also uses
the RxCLK A-AxCLK A pins to connect to an external quartz crystal.
CCR2
TSS
0
0
0
1
0
0
0
0
0
1
1
0
0
TIO
0
0
0
1
1
0
1
0
0
0
1
0
1
BRG
–
–
RxCLK
RxCLK
RxCLK
–
–
–
OSC
OSC
OSC
OSC
OSC
DPLL
–
–
BRG
BRG
BRG
–
–
–
BRG
BRG
BRG
BRG
BRG
Clock Sources
REC
RxCLK
RxCLK
DPLL
DPLL
DPLL
OSC
OSC
RxCLK
DPLL
DPLL
DPLL
DPLL
DPLL
TRM
TxCLK
RxCLK
TxCLK
BRG/16
DPLL
OSC
OSC
RxCLK
TxCLK
BRG/16
BRG/16
DPLL
DPLL
56
AxCLK
–
AxCLK
AxCLK
AxCLK
TxCLK
…
TxCLK
–
TxCLK
–
TxCLK
–
CD
R-Strobe
–
AxCLK
–
–
–
–
–
(TSAR)
–
–
–
–
–
Control Sources
–
TxCLK
–
–
–
–
–
(TSAX)
–
–
–
–
–
X-Strobe F-Sync
–
–
–
–
–
–
–
AxCLK
–
–
–
–
–
Output
via
TxCLK
–
–
–
BRG/16
DPLL
–
OSC
TS-Control
–
–
BRG/16
–
DPLL
SAB 82525
SAB 82525
SAB 82526
SAB 82526
SAF 82525
SAF 82525
SAF 82526
SAF 82526
Timer
Source
TCP
TxCLK
RxCLK
TxCLK
DPLL
DPLL
OSC
OSC
RxCLK
TxCLK
BRG/16
BRG/16
DPLL
DPLL