HW-FMC-XM105-G Xilinx Inc, HW-FMC-XM105-G Datasheet - Page 12
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HW-FMC-XM105-G
Manufacturer Part Number
HW-FMC-XM105-G
Description
CARD, CONNECTIVITY, FMC XM105
Manufacturer
Xilinx Inc
Datasheet
1.HW-FMC-XM105-G.pdf
(30 pages)
Specifications of HW-FMC-XM105-G
Kit Contents
FMC XM105 Debug Card, Welcome Letter, 4x Mounting Screws, 2x Standoffs
Features
VITA 57.1 FMC HPC Connector, Power Good LEDs
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 1: XM105
Table 1-2: XM105 Features (Cont’d)
12
Notes:
1. Available only with FMC HPC board interfaces. Xilinx Virtex-6 FPGA ML605 evaluation board provides one FMC LPC and one
Number
FMC HPC interface. Xilinx Spartan-6 FPGA SP601 and SP605 evaluation boards provide a single FMC LPC interface.
10
11
12
13
14
15
16
17
9
40-pin header
40-pin header
40-pin header
Mictor connector
9-pin header
Clocking
2 Kb EEPROM
Power Good LEDS
2-pin header
Feature
(1)
(1)
J2: 20 pin x 2 row male header
J1: 20 pin x 2 row male header
J3: 20 pin x 2 row male header
P1: 38 pin female Mictor connector
J19: 9 pin x 1 row male header with Mictor JTAG pins connected
between J19 and P1
SMA connectors (J9, J10) and Silicon Labs Si570 IIC serial bus
reprogrammable LVDS clock source
IIC compatible electrically erasable programmable memory
(EEPROM) with 2 Kb (256 bytes) of non-volatile storage.
Power good LEDS for +12V, board to mezzanine card (PG_C2M) and
V
J18: 2 pins x 1 male header for GND connection to PG_M2C LPC
connector.
adjust
/3.3V
www.xilinx.com
Notes
FMC XM105 Debug Card User Guide
UG537 (v1.2) September 24, 2010
Schematic
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