CY7C4281V-10JC Cypress Semiconductor Corp, CY7C4281V-10JC Datasheet - Page 8
CY7C4281V-10JC
Manufacturer Part Number
CY7C4281V-10JC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C4281V-10JC.pdf
(16 pages)
Specifications of CY7C4281V-10JC
Configuration
Dual
Density
576Kb
Access Time (max)
8ns
Word Size
9b
Organization
64Kx9
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
PLCC
Clock Freq (max)
100MHz
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Supply Current
25mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C4281V-10JC
Manufacturer:
CYPRESS
Quantity:
2 082
Document #: 38-06013 Rev. *B
Switching Waveforms
Write Cycle Timing
Read Cycle Timing
Notes:
12. t
13. t
between the rising edge of RCLK and the rising edge of WCLK is less than t
between the rising edge of WCLK and the rising edge of RCLK is less than t
REN1, REN2
SKEW1
SKEW1
REN1, REN2
(if applicable)
Q
D
WEN2
0
0
is the minimum time between a rising RCLK edge and a rising WCLK edge to guarantee that FF will go HIGH during the current clock cycle. If the time
is the minimum time between a rising WCLK edge and a rising RCLK edge to guarantee that EF will go HIGH during the current clock cycle. It the time
WEN1
WCLK
WCLK
WEN1
WEN2
RCLK
RCLK
–D
–Q
OE
FF
EF
17
17
t
ENS
t
OLZ
t
SKEW1
t
ENH
t
t
CLKH
CLKH
[12]
t
t
t
WFF
A
REF
t
OE
t
t
CLK
CKL
t
SKEW1
NO OPERATION
[13]
t
DS
t
t
CLKL
CLKL
t
ENS
SKEW1
SKEW2
, then FF may not change state until the next WCLK rising edge.
, then EF may not change state until the next RCLK rising edge.
t
VALID DATA
DH
t
ENH
t
REF
t
WFF
CY7C4261V/CY7C4271V
CY7C4281V/CY7C4291V
t
OHZ
NO OPERATION
NO OPERATION
Page 8 of 16
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