MT48H32M16LFCJ-8:A Micron Technology Inc, MT48H32M16LFCJ-8:A Datasheet - Page 53

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MT48H32M16LFCJ-8:A

Manufacturer Part Number
MT48H32M16LFCJ-8:A
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48H32M16LFCJ-8:A

Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
9/7ns
Maximum Clock Rate
125MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
85mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
Timing Diagrams
Figure 36:
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. J 2/08 EN
COMMAND
A0-A9, A11
BA0, BA1
DQM
A10
CKE
Initialize and Load Mode Register
CLK
DQ
1
Notes:
Power-up:
V
CLK stable
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T = 100µs
and
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1. PRE = PRECHARGE command, AR = AUTO REFRESH command, LMR = LOAD MODE REGISTER
2. Only NOPs or COMMAND INHIBITs may be issued during
3. At least one NOP or COMMAND INHIBIT is required during
CMS
t
CKS
NOP
T0
command.
t
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High-Z
CKH
CMH
t
CK
ALL BANKS
t
Precharge
AS
all banks
PRE
T1
t AH
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512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Tn + 1
AR
53
t
RFC
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2
To + 1
AR
Micron Technology, Inc., reserves the right to change products or specifications without notice.
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2
t AS t AH
t
Load Mode
AS
BA0 = L,
BA1 = L
Register
CODE
Tp + 1
CODE
LMR
t
AH
t
MRD
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RFC time.
Load Extended
Mode Register
3
t
MRD time.
BA0 = L,
BA1 = H
BA0 = L,
BA1 = L
CODE
CODE
Tq + 1
LMR
©2005 Micron Technology, Inc. All rights reserved.
Timing Diagrams
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3
VALID
VALID
VALID
VALID
DON’T CARE
Tr + 1
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