DP83815DVNG/HAPB National Semiconductor, DP83815DVNG/HAPB Datasheet - Page 50

• Manufacturer Part Number: DP83815DVNG/HAPB
• Manufacturer: National Semiconductor

Specifications of DP83815DVNG/HAPB

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Not Compliant

4.0 Register Set
4.2.10 Transmit Configuration Register
This register defines the Transmit Configuration for DP83815. It controls such functions as Loopback, Heartbeat, Auto
Transmit Padding, programmable Interframe Gap, Fill & Drain Thresholds, and maximum DMA burst size.
27-26
25-24
Bit
31
30
29
28
23
Bit Name
ECRETRY
MLB
ATP
CSI
HBI
IFG
Offset: 0024h
(Continued)
Tag: TXCFG
Carrier Sense Ignore
Setting this bit to 1 causes the transmitter to ignore carrier sense activity, which inhibits reporting of CRS
status to the transmit status register. When this bit is 0 (default), the transmitter will monitor the CRS
signal during transmission and reflect valid status in the transmit status register and MIB counter block.
This bit must be set to enable full-duplex operation.
HeartBeat Ignore
Setting this bit to 1 causes the transmitter to ignore the heartbeat (CD) pulse which follows the packet
transmission and inhibits logging of TXSQEErrors in the MIB counter block. When this bit is set to 0
(default), the transmitter will monitor the heartbeat pulse and log TXSQEErrors to the MIB counter block.
This bit must be set to enable full-duplex operation
MAC Loopback
Setting this bit to a 1 places the DP83815 MAC into a loopback state which routes all transmit traffic to
the receiver, and disables the transmit and receive interfaces of the MII. A 0 in this bit allows normal MAC
operation. The transmitter and receiver must be disabled before enabling the loopback mode. (Packets
received during MLB mode will reflect loopback status in the receive descriptor’s
Automatic Transmit Padding
Setting this bit to 1 causes the MAC to automatically pad small (runt) transmit packets to the Ethernet
minimum size of 64 bytes. This allows driver software to transfer only actual packet data. Setting this bit
to 0 disables the automatic padding function, forcing software to control runt padding.
Interframe Gap Time
This field allows the user to adjust the interframe gap time below the standard 9.6
960ns @100 Mb/s. The time can be programmed from 9.6
@100 Mb/s. Note that any value other than zero may violate the IEEE 802.3 standard. The formula for
the interframe gap is:
Reserved
writes are ignored, reads return 00.
Excessive Collision Retry Enable
This bit enables automatic retries of excessive collisions. If set, the transmitter will retry the packet up to
4 excessive collision counts, for a total of 64 attempts. If the packet still does not complete successfully,
then the transmission will be aborted after the 64th attempt. If this bit is not set, then the transmit will be
aborted after the 16th attempt. Note that setting this bit will change how collisions are reported in the
status field of the transmit descriptor.
9.6µs - 0.4(IFG[1:0]) µs @10 Mb/s and
960ns - 40(IFG[1:0])ns @100 Mb/s
Access: Read Write
Size: 32 bits
50
Description
µ
s to 8.4
Hard Reset: 00000102h
Soft Reset: 00000102h
µ
s @10 Mb/s and 960ns to 840ns
cmdsts.LBP
µ
s @10 Mb/s and
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field.)