UJA1065TW/3V3 NXP Semiconductors, UJA1065TW/3V3 Datasheet - Page 24

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UJA1065TW/3V3

Manufacturer Part Number
UJA1065TW/3V3
Description
Network Controller & Processor ICs HI SPEED CAN SYSTEM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UJA1065TW/3V3

Number Of Transceivers
1
Power Down Mode
Standby
Operating Supply Voltage (min)
5.5V
Supply Current
10mA
Operating Temperature (max)
125C
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Product
Controller Area Network (CAN)
Data Rate
20 Kbps
Supply Voltage (max)
27 V, 52 V
Supply Voltage (min)
5.5 V
Supply Current (max)
10 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
HTSSOP EP
Lead Free Status / RoHS Status
Compliant
Other names
UJA1065TW/3V3,512

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UJA1065TW/3V3
Manufacturer:
NXP
Quantity:
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Part Number:
UJA1065TW/3V3
Manufacturer:
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Quantity:
20 000
NXP Semiconductors
UJA1065_7
Product data sheet
Fig 12. States of the RTLIN pin
6.8.1.2 Off-line mode
6.8.2 LIN wake-up
6.8.3 Termination control
supplied directly
RTLIN = ON
out of BAT42
mode change to Active mode
The LTC bit can be used to set the LIN transceiver to a Listen-only mode. The transmitter
output stage is disabled in this mode.
When leaving Active mode the LIN transmitter is disabled and the LIN receiver is
monitoring the LIN-bus for a valid wake-up.
Off-line mode is the low-power mode of the LIN transceiver. The LIN transceiver is
disabled to save supply current. Pin RXDL reflects any wake-up event at the LIN-bus.
For a remote wake-up via LIN a LIN-bus signal is required as shown in
The RTLIN pin is in one of 3 different states: RTLIN = on, RTLIN = off or RTLIN = 75 μA;
see
Fig 11. LIN wake-up timing diagram
Figure
power-on
12.
Active mode and receiver recessive > t
Active mode and receiver dominant > t
Rev. 07 — 25 February 2010
wake-up
OR mode change to Active mode
LIN
OR Off-line mode
RTLIN = OFF
AND receiver recessive > t
High-speed CAN/LIN fail-safe system basis chip
t BUS(LIN)
Off-line mode
LIN(dom)(det)
LIN(dom)(rec)
AND receiver dominant > t
LIN(dom)(rec)
Off-line mode
001aad183
001aad447
RTLIN = 75 μA
supplied directly
LIN(dom)(det)
out of BAT42
UJA1065
© NXP B.V. 2010. All rights reserved.
Figure
11.
24 of 76

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