TS8388BMFS9NB1 E2V, TS8388BMFS9NB1 Datasheet - Page 9

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TS8388BMFS9NB1

Manufacturer Part Number
TS8388BMFS9NB1
Description
Manufacturer
E2V
Datasheet

Specifications of TS8388BMFS9NB1

Lead Free Status / RoHS Status
Supplier Unconfirmed
2.1
2.2
2.3
TSEV8388B - Evaluation Board User Guide
Board
AC Inputs/Digital
Outputs
DC Functions
Settings
The TS8388B requires proper board layout for optimum full speed operation.
The following explains the board layout recommendations and demonstrates how the
Evaluation Board fulfills these implementation constraints.
A single low impedance ground plane is recommended, since it allows the user to lay
out signal traces and power planes without interrupting the ground plane.
Therefore a multi-layer board structure has been retained for the TSEV8388B.
Four copper metal layers are used, dedicated respectively (from top to bottom) to the
signal traces, ground planes and power supplies.
The input/output signal traces occupy the top metal layer.
The ground planes occupy the second and third copper metal layers.
The bottom metal layer is dedicated to the power supplies.
The board uses 50Ω impedance microstrip lines for the differential analog inputs, clock
inputs, and differential digital outputs (including the out-of-range bit and the data ready
output signal).
The input signals and clock signals must be routed on one layer only, without using any
through-hole vias. The line lengths are matched to within 2 mm.
The digital output lines are 50Ω differentially terminated.
The output data traces lengths are matched to within 0.25 inch (6 mm) to minimize the
data output delay skew.
For the TSEV8388B the propagation delay is approximately 6.1 ps/mm (155 ps/inch).
The RO4003 typical dielectric constant is 3.4 at 10 GHz.
For more informations about different output termination options, refer to the specifica-
tion application notes.
The DC signals traces are low impedance.
They have been routed with 50Ω impedance near the device because of room
restriction.
Layout Information
e2v semiconductors SAS 2009
Section 2
0973D–BDC–02/09
2-1