UPD8862CY Renesas Electronics America, UPD8862CY Datasheet - Page 14

• Manufacturer Part Number: UPD8862CY
• Manufacturer: Renesas Electronics America

Specifications of UPD8862CY

• Lead Free Status / RoHS Status: Supplier Unconfirmed

φ
12
TG1 to
(Line clamp mode)
(Bit clamp mode)
φ
TG1 to
φ
TG3,
φ
φ
φ
φ
TG3
CLB
CLB
φ
RB
φ
φ
1,
1
2
φ
2 TIMING CHART
Notes 1. Set the
Remark Inverse pulse of the
t7
t9, t10
t12
t13, t14
t15, t16
t17, t18
t19
t20, t21
t22, t23
Symbol
2. Set the
3. Min. of t7 shows that the
φ
φ
CLB
RB
−5
φ
φ
5000
90%
Min.
900
200
RB and
RB to high level during this period.
t12
Note 3
0
0
0
0
Data Sheet S16033EJ3V0DS
t22
90%
t9
t15
φ
10%
t7
t17
90%
t20
CLB to high level during this period.
90%
φ
TG1 to
10000
t13
1000
Typ.
400
350
t12
25
25
50
50
φ
t7
RB and
φ
TG3 can be used as
90%
Note 1
Note 2
t19
t12
φ
50000
50000
Max.
CLB overlap each other.
−
−
−
−
−
−
−
t14
t21
t10
t18
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
φ
t16
CLB.
t23
µ
PD8862