AT94K05AL-25AQC Atmel, AT94K05AL-25AQC Datasheet - Page 131
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AT94K05AL-25AQC
Manufacturer Part Number
AT94K05AL-25AQC
Description
Manufacturer
Atmel
Datasheet
1.AT94K05AL-25AQC.pdf
(204 pages)
Specifications of AT94K05AL-25AQC
Device System Gates
5000
Propagation Delay Time
12.1ns
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Mounting
Surface Mount
Pin Count
100
Package Type
PQFP
Lead Free Status / RoHS Status
Not Compliant
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4.29.2
1138I–FPSLI–1/08
Data Reception
Figure 4-42
Figure 4-42. UART Receiver
Note:
The receiver front-end logic samples the signal on the RXDn pin at a frequency 16 times the
baud-rate. While the line is idle, one single sample of logic 0 will be interpreted as the falling
edge of a start bit, and the start bit detection sequence is initiated. Let sample 1 denote the first
zero-sample. Following the 1-to-0 transition, the receiver samples the RXDn pin at samples 8, 9
and 10. If two or more of these three samples are found to be logic 1s, the start bit is rejected as
a noise spike and the receiver starts looking for the next 1-to-0 transition.
XTAL
PE1/
PE3
1. n = 0, 1
shows a block diagram of the UART Receiver.
PIN CONTROL
GENERATOR
BAUD RATE
LOGIC
RXDn
(1)
BAUD x 16
DATA RECOVERY
LOGIC
UART CONTROL AND
STATUS REGISTER
DATA BUS
/16
(UCSRnB)
AT94KAL Series FPSLIC
STORE UDRn
BAUD
DATA BUS
RXCn
IRQ
UART CONTROL AND
STATUS REGISTER
SHIFT REGISTER
REGISTER (UDRn)
(UCSRnA)
10(11)-BIT RX
UART I/O DATA
131
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