IPPOSPHYP3 Altera, IPPOSPHYP3 Datasheet - Page 7
![no-image](/images/manufacturer_photos/0/0/40/altera_sml.jpg)
IPPOSPHYP3
Manufacturer Part Number
IPPOSPHYP3
Description
Manufacturer
Altera
Datasheet
1.IPPOSPHYP3.pdf
(62 pages)
Specifications of IPPOSPHYP3
Lead Free Status / RoHS Status
Not Compliant
- Current page: 7 of 62
- Download datasheet (2Mb)
Chapter 1: About This Compiler
General Description
General Description
© November 2009 Altera Corporation
The POS-PHY Level 2 and 3 Compiler generates MegaCore functions for use in link-
layer or physical layer (PHY) devices that transfer data to and from packet over
SONET/SDH (POS) devices using the standard POS-PHY bus.
The POS-PHY Level 2 and 3 Compiler comprises separately configurable modules,
which can be easily combined via the IP Toolbench to generate a highly
parameterized module, allowing POS-PHY compliant interfaces (and non-standard
interfaces) to be included in custom designs.
The compiler supports POS-PHY level 3 operating at up to 3.2 Gbps, and level 2
operating at up to 832 Mbps.
The POS-PHY Level 2 and 3 Compiler is compliant with all applicable standards,
including:
■
■
■
■
This allows efficient translation between the different formats, including mapping
between different bus speeds and bus widths, as well as customizable FIFO buffer
parameters.
The compiler allows configurations such as PHY-PHY, link-link bridges, or packet
multiplexing MegaCore functions, and SPHY and MPHY applications.
page 1–3
bridges.
Figure 1–1. Interfaces
POS-PHY Level 3 Specification, Issue 4, June 2000
POS-PHY Level 2 Specification, Issue 5, December 1998
Optical Internet working Forum (OIF), System Packet Interface Level 3 (SPI-3)
Altera Corporation, Atlantic Interface Specification
shows the possible interfaces.
MPHY
SPHY
SPHY
Preliminary
Interface
Interface
MegaCore
PHY/Link
Function
Interface
PHY
Link
SPHY
SPHY
SPHY
MegaCore
MegaCore
Function
Function
Figure 1–2 on page 1–4
Interface
Interface
Atlantic
Atlantic
Interface
Interface
Interface
Atlantic
Atlantic
Atlantic
POS-PHY Level 2 and 3 Compiler User Guide
shows the possible
Logic
Logic
Logic
Logic
Logic
User
User
User
User
User
Figure 1–1 on
1–3
Related parts for IPPOSPHYP3
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![DK-CYCII-2C20N](/photos/9/20/92074/mfgdk-cycii-2c20nboard_tmb.jpg)
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
![EP610PC-35](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-15](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610IPC-25](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-30](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-12](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10A](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![P85C224-66](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP320PC](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP2A15B724C7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-25T](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: