SAA7113H NXP Semiconductors, SAA7113H Datasheet - Page 32
SAA7113H
Manufacturer Part Number
SAA7113H
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7113H.pdf
(75 pages)
Specifications of SAA7113H
Video Resolution (max)
720Pixels
Pin Count
44
Package Type
PQFP
Lead Free Status / RoHS Status
Compliant
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Philips Semiconductors
9397 750 14232
Product data sheet
8.11 RTCO output
8.12 RTS0 and RTS1 terminals
Table 21:
[1]
[2]
[3]
The real-time control and status output signal contains serial information about the actual
system clock (increment of the HPLL), subcarrier frequency, increment and phase (via
reset) of the FSC-PLL and PAL sequence bit. The signal can be used for various
applications in external circuits, e.g. in a digital encoder to achieve clean encoding. The
SAA7113H supports RTC level 3.1 (see external document “RTC Functional Description” ,
available on request).
These two pins are multifunctional inputs/output controlled by I
and RTSE1[3:0], located in subaddress 12h (see
The RTS0 terminal can be strapped to ground via a 3.3 k resistor to change the I
slave address from default 4Ah/4Bh to 48h/49h (the strapping information is read only
during the reset sequence).
The RTS1 terminal can be configured as Data Output to 3-state (DOT) input by
RTSE1[3:0] = 0000 to control the VPO port (bits 7 to 0) via hardware according
to
Name Explanation
SAV
SDID
DC
IDI1
IDI2
DLNn sliced data LOW nibble, format: NEP
DLHn sliced data HIGH nibble, format: NEP
EAV
Table
Inverted EP (bit 7); for EP see
Even parity (bit 6) of bits 5 to 0.
Odd parity (bit 7) of bits 6 to 0.
start of active data (see
sliced data identification: NEP
subaddress 5Eh[5:0], e.g. to be used as source identifier
Dword count: NEP
to SAA7112, but does not represent any relevant information for SAA7113H applications.
DC describes the number of succeeding 32-bit words: DC =
two data identification bytes IDI1 and IDI2) and n = number of decoded bytes according to
the chosen text standard. As the sliced data are transmitted nibble wise, the maximum
number of bytes transmitted (NBT) starting at IDI1 results to: NBS = (DC
DC can vary between 1 and 11, depending on the selected data type. Note that the
number of bytes actually transmitted can be less than NBT for two reasons:
1. result of DC would result to a non-integer value (DC is always rounded up)
2. standard not recognized (wrong standard or poor input signal)
internal data identification 1: OP
LineNumber3
internal data identification 2: OP
DataType0 (see
end of active data (see
22.
Explanation to
Table
Rev. 02 — 9 May 2005
[1]
Table 20
, EP
7)
Table note
Table 8
Table 8
[2]
, DC5 to DC0; DC is inserted for software compatibility reasons
[1]
to
, EP
to
[3]
[3]
2.
Table
, FID (field 1 = 0, field 2 = 1), LineNumber8 to
, LineNumber2 to LineNumber0, DataType3 to
Table
[2]
[1]
[1]
, SDID5 to SDID0, freely programmable via I
, EP
, EP
10)
10)
[2]
[2]
, D3 to D0, 1, 1
, D7 to D4, 1, 1
Table 50
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
and
9-bit video input processor
1
2
Table
4
C-bus bits RTSE0[3:0]
(C + n), where C = 2 (the
SAA7113H
51).
8)
2.
2
2
C-bus
32 of 75
C-bus