SAA7111AHZV4 NXP Semiconductors, SAA7111AHZV4 Datasheet - Page 18

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SAA7111AHZV4

Manufacturer Part Number
SAA7111AHZV4
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7111AHZV4

Pin Count
64
Package Type
LQFP
Lead Free Status / RoHS Status
Compliant
Philips Semiconductors
1998 May 15
handbook, full pagewidth
handbook, full pagewidth
Enhanced Video Input Processor (EVIP)
VREF_CCIR 656 = vertical reference signal referring to the field interval definitions of CCIR656.
HREFINT = internal horizontal reference signal.
VREFINT = internal vertical reference signal.
VBP0 = programmable vertical reference signal.
VBP4 = delayed programmable vertical reference signal (4LLC clocks delay).
CREFINT = internal clock qualifier signal.
VREF CCIR 656
VBP0
VBP4
VREFINT
HREFINT
HREFINT
EN
EN
CCTR1 to 0
REG
REG
CREFINT
selected
CLOCK 0
CLOCK 0
VREF
Fig.10 CREF output signal generation.
Fig.9 VREF output signal generation.
VCTR1 to 0
V
C
T
R
1
0
0
1
1
C
C
T
R
V
C
T
R
1
0
0
1
1
0
0
1
0
1
C
C
R
T
0
0
1
0
1
VREFINT
VREF CCIR 656
VBP0
VBP4
VREFOUT
CREFINT
0 if VREF = 0
1 if VREF = 0
1 (always HIGH)
CREFOUT
18
REG
CLOCK 0
COMPO
0
1
MUX
MGG066
CREF
Product specification
REG
REG
CLOCK 0
CLK0
SAA7111A
MGG065
HREF
VREF

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