SAA7111AHV4 NXP Semiconductors, SAA7111AHV4 Datasheet - Page 33

• Manufacturer Part Number: SAA7111AHV4
• Manufacturer: NXP Semiconductors

Specifications of SAA7111AHV4

• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
1998 May 15
handbook, full pagewidth
Enhanced Video Input Processor (EVIP)
(1) ODD is switched to output RTS0 via I
(2) Line numbers in parenthesis refer to CCIR line counting.
(3) Additional VREF positions can be achieved via I
The luminance peaking and the chrominance trap are bypassed during VREF = 0 if I
The chrominance delay line (chrominance-comb filter for NTSC, phase error correcting for PAL) is disabled during VREF = 0.
RTS0 (ODD)
RTS0 (ODD)
input CVBS
input CVBS
Fig.25 Vertical timing diagram for 60 Hz [nominal input signal VNL in normal mode (VNOI = 00b)].
HREF
HREF
VREF
VREF
VREF
VREF
VS
VS
(1)
(1)
VRLN = 1
VRLN = 0
VRLN = 1
VRLN = 0
(262)
259
(525)
522
(3)
(3)
(263)
(3)
(3)
260
523
(1)
(264)
261
524
2
(2)
C-bus bit RTSE0 = 0.
(265)
262
525
(3)
2
C-bus bits VCTR1 and VCTR0 (see Fig.9).
(266)
263
(4)
1
(267)
264
(5)
2
(268)
265
33
(6)
3
(a) 1st field
(b) 2nd field
(269)
266
(7)
4
2
C-bus bit VBLB is set to logic 1.
(270)
267
(8)
5
(271)
268
(9)
6
(272)
269
(10)
7
(273)
270
(11)
8
81 x 2/LLC
520 x 2/LLC
(274)
271
(20)
17
Product specification
SAA7111A
(283)
280
(21)
18
(284)
MGG070
281
(22)
19
(2)
(285)
282
(2)