PPC440EP-3JC333C Applied Micro Circuits Corporation, PPC440EP-3JC333C Datasheet - Page 50

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PPC440EP-3JC333C

Manufacturer Part Number
PPC440EP-3JC333C
Description
Manufacturer
Applied Micro Circuits Corporation
Datasheet

Specifications of PPC440EP-3JC333C

Family Name
440EP
Device Core
PowerPC
Device Core Size
16b
Frequency (max)
333MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5/2.5V
Operating Supply Voltage (max)
1.6/2.7V
Operating Supply Voltage (min)
1.4/2.3V
Operating Temp Range
-40C to 90C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
456
Package Type
E-PBGA
Lead Free Status / RoHS Status
Compliant

Available stocks

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Quantity
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Part Number:
PPC440EP-3JC333C
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Company:
Part Number:
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Quantity:
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Signal Descriptions
The PPC440EP embedded controller is packaged in a 456-ball enhanced plastic ball grid array (E-PBGA). The
following tables describe the package level pinout.
In the table “Signal Functional Description” on page 52, each I/O signal is listed along with a short description of its
function. Active-low signals (for example, RAS) are marked with an overline. Please see “Signals Listed
Alphabetically” on page 19 for the pin (ball) number to which each signal is assigned.
Multiplexed Signals
Some signals are multiplexed on the same pin so that the pin can be used for different functions. In most cases,
the signal names shown in this table are not accompanied by signal names that may be multiplexed on the same
pin. If you need to know what, if any, signals are multiplexed with a particular signal, look up the name in “Signals
Listed Alphabetically” on page 19. It is expected that in any single application a particular pin will always be
programmed to serve the same function. The flexibility of multiplexing allows a single chip to offer a richer pin
selection than would otherwise be possible. The circuit type for multiplexed signals is shown as “Multiplex.” The
actual circuit type is the same as the primary signal.
Note: Signals multiplexed with GPIO default to GPIO receivers and float after reset. Initialization software must
configure the GPIO registers for the desired function as described in the GPIO Chapter of the User’s Manual. Any
of these signals requiring a particular state prior to running initialization code must be terminated with pull ups or
pull downs.
Multipurpose Signals
In addition to multiplexing, some pins are also multi-purpose. For example, the EBC peripheral controller address
pins (PerAddr) are used as outputs by the PPC440EP to broadcast an address to external slave devices when the
PPC440EP has control of the external bus. When during the course of normal chip operation an external master
gains ownership of the external bus, these same pins are used as inputs which are driven by the external master
and received by the EBC in the PPC440EP. In this example, the pins are also bidirectional, serving both as inputs
and outputs.
50
Revision 1.29 – May 07, 2008
Data Sheet
Table 7. Pin Summary
Total Signal Pins
Total Power Pins
Total Pins
Reserved
Group
SAV
SAGnd
AV
AGnd
OV
SV
Gnd
V
DD
DD
DD
DD
DD
440EP – PPC440EP Embedded Processor
No. of Pins
304
152
456
18
18
32
80
1
1
1
1
0
AMCC Proprietary

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