LE3100MICH S L9PU Intel, LE3100MICH S L9PU Datasheet - Page 45

• Manufacturer Part Number: LE3100MICH S L9PU
• Manufacturer: Intel

Specifications of LE3100MICH S L9PU

• Family Name: Xeon Processor 3100
• Device Core Size: 64b
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 1.3625V
• Operating Supply Voltage (min): 0.85V
• Mounting: Surface Mount
• Pin Count: 1284
• Package Type: FCBGA3
• Lead Free Status / RoHS Status: Compliant

Land Listing and Signal Descriptions
Datasheet
Table 4-1.
FERR#/PBE#
Land Name
GTLREF0
FC24
FC25
FC26
FC27
FC28
FC29
FC30
FC31
FC32
FC33
FC34
FC35
FC36
FC37
FC38
FC39
FC40
FC41
FC3
FC4
FC5
FC8
Alphabetical Land
Assignments
Land #
AK1
H15
H16
AD3
AB3
G10
AA2
AM6
AK6
AL1
E29
J16
J17
G1
U1
U2
U3
H4
C9
R3
H1
T2
F2
J2
Signal
Buffer
Power/
Power/
Power/
Power/
Power/
Power/
Power/
Power/
Power/
Power/
Power/
Power/
Power/
Power/
Power/
Power/
Power/
Power/
Power/
Asynch
Power/
Power/
Power/
Power/
CMOS
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Other
Type
Direction
Output
Input
Table 4-1.
Land Name
PROCHOT#
PWRGOOD
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
ITP_CLK0
ITP_CLK1
GTLREF1
IGNNE#
LOCK#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
HITM#
MSID0
MSID1
IERR#
INIT#
LINT0
LINT1
HIT#
PECI
Alphabetical Land
Assignments
Land #
AH2
AB2
AK3
AL2
A20
AC4
AE4
AE6
AJ3
W1
H2
D4
G5
N1
M6
D1
E4
N2
P3
K1
C3
V1
K4
K6
V2
L1
J5
J6
Common
Common
Common
Asynch
Asynch
Asynch
Asynch
Asynch
Asynch
Signal
Buffer
Power/
Power/
Power/
Power/
Power/
Source
Source
Source
Source
Source
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
Synch
Synch
Synch
Synch
Synch
Other
Other
Other
Other
Other
Type
Clock
Clock
Clock
TAP
TAP
Direction
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Input/
Input/
Input/
Input/
Input/
Input/
Input
Input
Input
Input
Input
Input
Input
Input
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