CY8C5246AXI-038 Cypress Semiconductor Corp, CY8C5246AXI-038 Datasheet - Page 3

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CY8C5246AXI-038

Manufacturer Part Number
CY8C5246AXI-038
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY8C5246AXI-038

Lead Free Status / RoHS Status
Compliant
1. Architectural Overview
Introducing the CY8C52 family of ultra low power, flash Programmable System-on-Chip (PSoC) devices, part of a scalable 8-bit
PSoC 3 and 32-bit PSoC 5 platform. The CY8C52 family provides configurable blocks of analog, digital, and interconnect circuitry
around a CPU subsystem. The combination of a CPU with a flexible analog subsystem, digital subsystem, routing, and I/O enables
a high level of integration in a wide variety of consumer, industrial, and medical applications.
Figure 1-1
CY8C52 family. They are:
Document Number: 001-55034 Rev. *G
ARM Cortex-M3 CPU subsystem
Nonvolatile subsystem
Programming, debug, and test subsystem
Inputs and outputs
Clocking
Power
Digital subsystem
Analog subsystem
0. 5 to 5.5 V
( Optional )
4
32.768 KHz
( Optional )
( Optional )
to
33 MHz
on page 3 illustrates the major components of the
System Wide
Resources
Clocking System
Power Management
Xtal
Osc
IMO
1.8 V LDO
POR and
Power
Timer
System
Wake
Sleep
WDT
LVD
SMP
RTC
ILO
and
PRELIMINARY
Digital Interconnect
Figure 1-1. Simplified Block Diagram
EEPROM
8- Bit
Timer
I 2C Slave
UART
Temperature
EMIF
LCD Direct
UDB
UDB
UDB
CapSense
UDB
Drive
Sensor
Universal Digital Block Array (24 x UDB)
Memory System
Quadrature Decoder
8- Bit SPI
UDB
UDB
UDB
UDB
FLASH
SRAM
12- Bit SPI
12- Bit PWM
Logic
DAC
UDB
UDB
UDB
UDB
16- Bit
PWM
System Bus
16- Bit PRS
8- Bit
PSoC’s digital subsystem provides half of its unique
configurability. It connects a digital signal from any peripheral to
any pin through the digital system interconnect (DSI). It also
provides functional flexibility through an array of small, fast, low
power UDBs. PSoC Creator provides a library of pre-built and
tested standard digital peripherals (UART, SPI, LIN, PRS, CRC,
timer, counter, PWM, AND, OR, and so on) that are mapped to
the UDB array. The designer can also easily create a digital
circuit using boolean primitives by means of graphical design
entry. Each UDB contains programmable array logic
(PAL)/programmable logic device (PLD) functionality, together
with a small state machine engine to support a wide variety of
peripherals.
In addition to the flexibility of the UDB array, PSoC also provides
configurable digital blocks targeted at specific functions. For the
Timer
Digital System
Analog Interconnect
UDB
UDB
UDB
UDB
PSoC
Logic
Cortex M3 CPU
Controller
Analog System
8051 or
Cache
UDB
UDB
UDB
UDB
SAR
ADC
ADC
CPU System
®
UDB
UDB
UDB
UDB
5: CY8C52 Family Datasheet
Controller
Interrupt
PHUB
DMA
Counter
Timer
PWM
4 x
CAN
2.0
CMP
2 x
Program &
Boundary
Debug &
Program
Debug
+
-
Trace
Scan
FS USB
Master /
Slave
I2C
2.0
USB
PHY
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