LH79524N0F100A1 NXP Semiconductors, LH79524N0F100A1 Datasheet - Page 42

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LH79524N0F100A1

Manufacturer Part Number
LH79524N0F100A1
Description
Microcontrollers (MCU) LCD USB ETH'NET MMU LFBGA208
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LH79524N0F100A1

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Applications
Embedded Control
Processing Unit
Microcontroller
Operating Supply Voltage (min)
1.7/3V
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.9/3.6V
Package Type
LFBGA
Screening Level
Industrial
Pin Count
208
Mounting
Surface Mount
Rad Hardened
No
Data Bus Width
32 bit
Program Memory Type
ROMLess
Data Ram Size
16 KB
Interface Type
I2C, I2S, IrDA, SSP, UART, USB
Maximum Clock Frequency
76.205 MHz
Number Of Programmable I/os
108
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
LFBGA
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LH79524N0F100A1
Manufacturer:
HONEYWELL
Quantity:
3 000
Part Number:
LH79524N0F100A1,55
Manufacturer:
NXP Semiconductors
Quantity:
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LH79524/LH79525
SDRAM MEMORY CONTROLLER WAVEFORMS
SDRAM Burst Read (page already open). Figure 22
shows the waveform and timing for SDRAM to Activate
a Bank and Write.
42
Figure 21 shows the waveform and timing for an
NOTES:
1. SDRAMcmd is the combination of nRAS, nCAS, nSDWE, and nSDCS(X).
2. tOVXXX represents tOVRA, tOVCA, tOVSDW, or tOVSC.
3. tOHXXX represents tOHRA, tOHCA, tOHSDW, or tOHSC.
4. SDCKE is HIGH.
SDRAMcmd
D[31:0]
A[14:0]
DQMx
SCLK
t SDCLK
Figure 21. SDRAM Burst Read
Rev. 02 — 17 March 2009
NXP Semiconductors
t OVXXX
t OVDQ
READ
COLUMN
BANK,
t OHXXX
t OVA
LATENCY = 2
NOP
CAS
tISD tIHD
NOP
DATA n
NOP
t OHDQ
DATA n + 1
READ
DATA n + 2
NOP
DATA n + 3
NOP
Product data sheet
System-on-Chip
LH79525-3

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