ISP1160BM,518 NXP Semiconductors, ISP1160BM,518 Datasheet - Page 33
ISP1160BM,518
Manufacturer Part Number
ISP1160BM,518
Description
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1160BM518.pdf
(87 pages)
Specifications of ISP1160BM,518
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Package Type
PQFP
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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ISP1160-01_7
Product data sheet
Fig 27. Using an external OC detection circuit.
’n’ represents the downstream port number (n = 1 or 2).
V BUS
9.8.2 Using an external OC detection circuit
9.9.1 HC suspended state
9.9 Suspend and wake-up
downstream
connector
USB
port
When V
OC detection circuit cannot be used. An external OC detection circuit must be used
instead. Regardless of the V
used. To use an external OC detection circuit, AnalogOCEnable, bit 10 of the
HcHardwareConfiguration register, should be logic 0. By default after reset, this bit is
already logic 0; therefore, the HCD does not need to clear this bit.
Figure 27
The HC can be put into suspended state by setting the HcControl register (01H to read,
81H to write). See
OC detect
V o
external
OC
EN
V i
CC
shows how to use an external OC detection circuit.
(pin 56) is connected to a 3.3 V instead of the 5 V power supply, the internal
+ 5 V
47 pF
(2×)
22 Ω
22 Ω
+ 3.3 V or + 5 V
H_PSWn_N
Figure 14
H_OCn_N
V CC
Rev. 07 — 29 September 2009
H_DMn
H_DPn
CC
for the HC’s flow of USB state changes.
value, an external OC detection circuit can always be
OC detect
regulator
≥
15 kΩ
(2×)
bit 12
Configuration
HcHardware
ATX
OC select
1
0 Reg
PSW
C/L
Embedded USB host controller
HC CORE
ISP1160/01
SIE
Configuration
HcHardware
ISP1160/01
bit 10
© ST-ERICSSON 2009. All rights reserved.
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