ISP1760ETUM STEricsson, ISP1760ETUM Datasheet - Page 68

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ISP1760ETUM

Manufacturer Part Number
ISP1760ETUM
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1760ETUM

Package Type
TFBGA
Pin Count
128
Lead Free Status / RoHS Status
Compliant

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Table 74.
CD00222702
Product data sheet
Bit
DW7
63 to 52
51 to 40
39 to 32
DW6
31 to 28
27 to 16
15 to 4
3 to 0
DW5
63 to 56
55 to 44
43 to 32
DW4
31 to 29
28 to 26
25 to 23
22 to 20
19 to 17
16 to 14
13 to 11
10 to 8
7 to 0
Symbol
INT_IN_7[11:0]
INT_IN_6[11:0]
INT_IN_5[11:4]
INT_IN_5[3:0]
INT_IN_4[11:0]
INT_IN_3[11:0]
INT_IN_2[11:8]
INT_IN_2[7:0]
INT_IN_1[11:0]
INT_IN_0[11:0]
Status7[2:0]
Status6[2:0]
Status5[2:0]
Status4[2:0]
Status3[2:0]
Status2[2:0]
Status1[2:0]
Status0[2:0]
μSA[7:0]
High-speed interrupt IN and OUT: bit description
Access
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
SW — writes
(0 → 1)
HW — writes
(1 → 0)
After
processing
Value
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Rev. 08 — 13 April 2010
Description
Bytes received during μSOF7, if μSA[7] is set to 1 and frame number
is correct.
Bytes received during μSOF6, if μSA[6] is set to 1 and frame number
is correct.
Bytes received during μSOF5 (bits 11 to 4), if μSA[5] is set to 1 and
frame number is correct.
Bytes received during μSOF5 (bits 3 to 0), if μSA[5] is set to 1 and
frame number is correct.
Bytes received during μSOF4, if μSA[4] is set to 1 and frame number
is correct.
Bytes received during μSOF3, if μSA[3] is set to 1 and frame number
is correct.
Bytes received during μSOF2 (bits 11 to 8), if μSA[2] is set to 1 and
frame number is correct.
Bytes received during μSOF2 (bits 7 to 0), if μSA[2] is set to 1 and
frame number is correct.
Bytes received during μSOF1, if μSA[1] is set to 1 and frame number
is correct.
Bytes received during μSOF0, if μSA[0] is set to 1 and frame number
is correct.
INT IN or OUT status of μSOF7
INT IN or OUT status of μSOF6
INT IN or OUT status of μSOF5
INT IN or OUT status of μSOF4
INT IN or OUT status of μSOF3
INT IN or OUT status of μSOF2
INT IN or OUT status of μSOF1
Status of the payload on the USB bus for this μSOF after INT has
been delivered.
Bit 0 — Transaction error (IN and OUT)
Bit 1 — Babble (IN token only)
Bit 2 — Underrun (OUT token only)
When the frame number of bits DW2[7:3] match the frame number of
the USB bus, these bits are checked for 1 before they are sent for
μSOF. For example: When μSA[7:0] = 1, 1, 1, 1, 1, 1, 1, 1: send INT
for every μSOF of the entire millisecond. When μSA[7:0] = 0, 1, 0, 1,
0, 1, 0, 1: send INT for μSOF0, μSOF2, μSOF4 and μSOF6. When
μSA[7:0] = 1, 0, 0, 0, 1, 0, 0, 0: send INT for every fourth μSOF.
Embedded Hi-Speed USB host controller
© ST-ERICSSON 2010. All rights reserved.
ISP1760
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