ISP1760ETUM STEricsson, ISP1760ETUM Datasheet - Page 4

• Manufacturer Part Number: ISP1760ETUM
• Manufacturer: STEricsson

Specifications of ISP1760ETUM

• Package Type: TFBGA
• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

5. Block diagram
CD00222702
Product data sheet
Fig 1.
RD_N
DREQ
DACK
CS_N
WR_N
IRQ
The figure shows the LQFP pinout. For the TFBGA ballout, see
All ground pins should normally be connected to a common ground plane.
Block diagram
RREF1
DATA[15:0]/DATA[31:0]
107
108
112
114
106
116
37 to 39, 41 to 43,
45 to 47, 49, 51,
52, 54, 56 to 58,
60 to 62, 64 to 66,
68 to 70, 72 to 74,
76 to 78, 80
82, 84, 86, 87,
89, 91 to 93,
95 to 98,
100 to 103, 105
(RREF1)
16
A[17:1]
GND
USB FULL-SPEED AND LOW-SPEED DATA PATH
15
DP1
USB ATX1
HI-SPEED
20
GNDA
PORT ROUTING OR CONTROL LOGIC + HOST AND HUB PORT STATUS
19
DM1
17
PSW1_N
18
21 127
OC1_N
RISC PROCESSOR
CONFIGURATION
MANAGEMENT
TRANSACTION
CONTROLLER
TRANSLATOR
INTERFACE:
INTERRUPT
HARDWARE
REGISTERS
SLAVE DMA
RREF2
CONTROL
MEMORY
AND RAM
V
UNIT
CC(I/O)
(RREF2)
23
+
+
+
GND
10, 40, 48, 59, 67,
75, 83, 94, 104, 115
22
DP2
USB ATX2
HI-SPEED
27
GNDA
Rev. 08 — 13 April 2010
16-bit
26
32-bit
or
DM2
PSW2_N
25
28 128
OC2_N
USB HIGH-SPEED DATA PATH
HC PTD MEMORY
MEMORY (60 kB)
OPERATIONAL
RREF3
HC PAYLOAD
ISP1760BEUM
ISP1760BEGA
REGISTERS
Table
EHCI AND
MEMORY
AND FIFO
ARBITER
(RREF3)
30
(3 kB)
GND
PIE
29
2.
DP3
USB ATX3
HI-SPEED
Embedded Hi-Speed USB host controller
34 33
GNDA
DM3
PSW3_N
GLOBAL CONTROL
POWER-ON RESET
32
MANAGEMENT
AND V
AND POWER
5 V-TO-1.8 V
REGULATOR
5 V-TO-3.3 V
REGULATOR
35 1
OC3_N
VOLTAGE
VOLTAGE
30 MHz
60 MHz
BAT
OVERCURRENT
AND ANALOG
14, 36, 44, 55, 63,
71, 79, 90, 99, 109
DETECTION
ON
DIGITAL
GNDD
PLL
53, 88, 121
© ST-ERICSSON 2010. All rights reserved.
4, 17, 24,
004aaa435
85, 118
31, 123
5, 50,
122
110
6, 7
119
ISP1760
11
12
13
9
2
8
CLKIN
XTAL1
XTAL2
RESET_N
SUSPEND/
WAKEUP_N
BAT_ON_N
REG1V8
REG3V3
REF5V
GND(OSC)
GNDA
GNDC
V
CC(5V0)
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