FDC37C78-HT Standard Microsystems (SMSC), FDC37C78-HT Datasheet - Page 68

• Manufacturer Part Number: FDC37C78-HT
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37C78-HT

• Package Type: TQFP
• Lead Free Status / RoHS Status: Compliant

CR08
This register can only be accessed in the Configuration Mode and after the CSR has been initialized to
08H.
CR09
This register can only be accessed in the Configuration Mode and after the CSR has been initialized to
09H. The default value of this register after power up is 00H. This register is read only.
CR0A
This register can only be accessed in the Configuration Mode and after the CSR has been initialized to
0AH. The default value of this register after power up is 00H. This register is read only.
CR0B
This register can only be ac1cessed in the Configuration Mode and after the CSR has been initialized
table used for each drive. Refer to CR1F for Drive Type register.
CR0C
This register can only be accessed in the Configuration Mode and after the CSR has been initialized to
0CH. The default value of this register after power up is 00H. This register is reserved.
to
DRT1
0BH. The default value of this register after power up is 00H. This register indicates the data rate
BIT NO.
D7
The default value of this register after power up is 00H. This register is read only.
0,1
4:6
2
3
7
FDD3
DRT0
D6
Floppy Boot
Floppy Disk
BIT NAME
Media ID0
Media ID1
Reserved
Polarity
Polarity
Enable
DRT1
D5
FDD2
This bit is used to define the boot floppy.
0 = Drive A (default)
1 = Drive B
0 = Non-invert
1 = Invert
0 = Non-invert
1 = Invert
Read as 0.
This bit controls the AUTOPOWER DOWN feature of the Floppy
Disk. The function is:
0 = Auto powerdown disabled (default)
1 = Auto powerdown enabled
This bit is reset to the default state by POR or a hardware reset.
DRT0
Table 41 - CR0B
Table 40 - CR07
D4
68
DRT1
D3
FDD1
DESCRIPTION
DRT0
D2
DRT1
D1
FDD0
DRT0
D0