FDC37C78-HT Standard Microsystems (SMSC), FDC37C78-HT Datasheet - Page 12

• Manufacturer Part Number: FDC37C78-HT
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37C78-HT

• Package Type: TQFP
• Lead Free Status / RoHS Status: Compliant

DIGITAL OUTPUT REGISTER (DOR)
Address 3F2 READ/WRITE
The DOR controls the drive select and motor
enables of the disk interface outputs. It also
BIT 0 and 1 DRIVE SELECT
These two bit a are binary encoded for the four
drive selects DS0-DS3, thereby allowing only
one drive to be selected at one time.
BIT 2 nRESET
A logic "0" written to this bit resets the Floppy disk
controller. This reset will remain active until a logic
"1" is written to this bit. This software reset does
not affect the DSR and CCR registers, nor does it
affect the other bits of the DOR register.
minimum reset duration required is 100ns,
therefore toggling this bit by consecutive writes to
this register is a valid method of issuing a software
reset.
BIT 3 DMAEN
Writing this bit to logic "1" will enable the DRQ,
nDACK, TC and IRQ outputs. This bit being a
logic "0" will disable the nDACK and TC inputs,
and hold the DRQ and IRQ outputs in a high
impedance state. This bit is a logic "0" after a
reset and in these modes.
RESET
COND.
MOT
EN3
7
0
MOT
EN2
6
0
MOT
EN1
5
0
The
MOT
EN0
12
4
0
contains the enable for the DMA logic and
contains a software reset bit. The contents of the
DOR are unaffected by a software reset.
DOR can be written to at any time.
BIT 4 MOTOR ENABLE 0
This bit controls the MTR0 disk interface output. A
logic "1" in this bit will cause the output pin to go
active.
BIT 5 MOTOR ENABLE 1
This bit controls the MTR1 disk interface output. A
logic "1" in this bit will cause the output pin to go
active.
BIT 6 MOTOR ENABLE 2
This bit controls the MTR2 disk interface output. A
logic "1" in this bit will cause the output pin to go
active.
BIT 7 MOTOR ENABLE 3
This bit controls the MTR3 disk interface output. A
logic "1" in this bit causes the output to go active.
DMAEN nRESET DRIVE
3
0
Table 3 - Drive Activation Values
DRIVE
0
1
2
3
2
0
SEL1
1
0
DOR VALUE
DRIVE
1CH
2DH
4EH
8FH
SEL0
0
0
The