ISP1760ETGA STEricsson, ISP1760ETGA Datasheet - Page 80

• Manufacturer Part Number: ISP1760ETGA
• Manufacturer: STEricsson

Specifications of ISP1760ETGA

• Package Type: TFBGA
• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

Table 82.
CD00222702
Product data sheet
Bit
DW7
63 to 40
39 to 32
DW6
31 to 24
23 to 16
15 to 8
7 to 0
DW5
63 to 56
55 to 48
47 to 40
39 to 32
DW4
31 to 29
28 to 26
25 to 23
22 to 20
19 to 17
16 to 14
13 to 11
10 to 8
Symbol
reserved
INT_IN_7[7:0]
INT_IN_6[7:0]
INT_IN_5[7:0]
INT_IN_4[7:0]
INT_IN_3[7:0]
INT_IN_2[7:0]
INT_IN_1[7:0]
INT_IN_0[7:0]
μSCS[7:0]
Status7[2:0]
Status6[2:0]
Status5[2:0]
Status4[2:0]
Status3[2:0]
Status2[2:0]
Status1[2:0]
Status0[2:0]
Start and complete split for interrupt: bit description
Access
-
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
SW — writes
(0 → 1)
HW — writes
(1 → 0)
After
processing
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
-
-
-
-
-
-
-
-
-
Value
-
-
-
-
-
-
-
-
-
Rev. 08 — 13 April 2010
Description
-
Bytes received during μSOF7, if μSA[7] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
Bytes received during μSOF6, if μSA[6] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
Bytes received during μSOF5, if μSA[5] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
Bytes received during μSOF4, if μSA[4] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
Bytes received during μSOF3, if μSA[3] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
Bytes received during μSOF2 (bits 7 to 0), if μSA[2] is set to 1 and
frame number is correct. The new value continuously overwrites
the old value.
Bytes received during μSOF1, if μSA[1] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
Bytes received during μSOF0 if μSA[0] is set to 1 and frame
number is correct. The new value continuously overwrites the old
value.
All bits can be set to one for every transfer. It specifies which μSOF
the complete split needs to be sent. Valid only for IN. Start split and
complete split active bits, μSA = 0000 0001, μSCS = 0000 0100,
will cause SS to execute in μFrame0 and CS in μFrame2.
Interrupt IN or OUT status of μSOF7
Interrupt IN or OUT status of μSOF6
Interrupt IN or OUT status of μSOF5
Interrupt IN or OUT status of μSOF4
Interrupt IN or OUT status of μSOF3
Interrupt IN or OUT status of μSOF2
Interrupt IN or OUT status of μSOF1
Interrupt IN or OUT status of μSOF0
Bit 0 — Transaction error (IN and OUT)
Bit 1 — Babble (IN token only)
Bit 2 — Underrun (OUT token only)
Embedded Hi-Speed USB host controller
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