W83627THF Nuvoton Technology Corporation of America, W83627THF Datasheet - Page 96

• Manufacturer Part Number: W83627THF
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627THF

• Pin Count: 128
• Lead Free Status / RoHS Status: Not Compliant

7.1.5
CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR60, CR 61 (Default 0x00, 0x60 if PNPCSV = 0 during POR, default 0x00 otherwise)
These two registers select the first KBC I/O base address [0x100:0xFFF] on 1 byte boundary.
CR62, CR 63 (Default 0x00, 0x64 if PNPCSV = 0 during POR, default 0x00 otherwise)
These two registers select the second KBC I/O base address [0x100:0xFFF] on 1 byte boundary.
CR70 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR72 (Default 0x0C if PNPCSV = 0 during POR, default 0x00 otherwise)
CRF0 (Default 0x80)
Bit 7 - 1 : Reserved.
Bit 0
Bit 7 - 4 : Reserved.
Bit [3:0] : These bits select IRQ resource for KINT (keyboard).
Bit 7 - 4 : Reserved.
Bit [3:0] : These bits select IRQ resource for MINT (PS2 Mouse)
Bit 7 - 6 : KBC clock rate selection
Bit 5 - 3 : Reserved.
Bit 2
Bit 1
Bit 0
Logical Device 5 (KBC)
= 1 Activates the logical device.
= 0 Logical device is inactive.
= 00 Select 6MHz as KBC clock input.
= 01 Select 8MHz as KBC clock input.
= 10 Select 12Mhz as KBC clock input.
= 11 Select 16Mhz as KBC clock input.
= 0 Port 92 disable.
= 1 Port 92 enable.
= 0 Gate20 software control.
= 1 Gate20 hardware speed up.
= 0 KBRST software control.
= 1 KBRST hardware speed up.
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W83627THF/W83627THG
Publication Release Date: September 26, 2006
Revision 1.2