CY7C185-35LMB Cypress Semiconductor Corp, CY7C185-35LMB Datasheet - Page 3

• Manufacturer Part Number: CY7C185-35LMB
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C185-35LMB

• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-05043 Rev. *B
AC Test Loads and Waveforms
Switching Characteristics
OUTPUT
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
t
Notes:
RC
AA
OHA
ACE1
ACE2
DOE
LZOE
HZOE
LZCE1
LZCE2
HZCE
PU
PD
WC
SCE1
SCE2
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
4. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
5. t
6. At any given temperature and voltage condition, t
7. The internal write time of the memory is defined by the overlap of CE
Parameter
I
signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
OL
HZOE,
INCLUDING
5V
/I
OH
JIG AND
SCOPE
t
HZCE
and 30-pF load capacitance.
30 pF
[7]
, and t
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE
CE
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE
CE
CE
CE
CE
CE
CE
CE
Write Cycle Time
CE
CE
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE Pulse Width
Data Set-up to Write End
Data Hold from Write End
WE LOW to High Z
WE HIGH to Low Z
(a)
HZWE
R1 481 Ω
1
2
1
2
1
2
1
2
1
2
1
2
LOW to Power-Down
LOW to Data Valid
HIGH to Data Valid
LOW to Low Z
HIGH to Low Z
HIGH to High Z
LOW to High Z
LOW to Power-Up
to HIGH to Power-Up
HIGH to Power-Down
LOW to Write End
HIGH to Write End
are specified with C
R2
255Ω
Description
OUTPUT
Over the Operating Range
[6]
[5]
[5]
[5, 6]
INCLUDING
L
5V
= 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady state voltage.
JIGAND
SCOPE
HZCE
5 pF
is less than t
(b)
R1 481 Ω
Min.
15
15
12
12
12
12
3
3
3
3
0
0
0
8
0
3
LZCE1
1
LOW, CE
-15
R2
255Ω
[4]
and t
Max.
15
15
15
15
8
7
7
7
LZCE2
2
HIGH, and WE LOW. All 3 signals must be active to initiate a write and either
for any given device.
Min.
20
20
15
15
15
15
10
5
3
5
3
0
0
0
0
5
-20
GND
3.0V
Max.
Equivalent to:
≤ 5 ns
20
20
20
20
9
8
8
7
OUTPUT
10%
Min.
25
25
20
20
20
15
10
5
3
5
3
0
0
0
0
5
-25
ALL INPUT PULSES
90%
Max.
THÉVENIN EQUIVALENT
25
25
25
12
10
10
20
7
167Ω
Min.
35
35
20
20
25
20
12
5
3
5
3
0
0
0
0
5
-35
CY7C185
Max.
90%
1.73V
35
35
35
15
10
10
20
Page 3 of 12
8
10%
≤ 5 ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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