5962-8948403M3A QP SEMICONDUCTOR, 5962-8948403M3A Datasheet - Page 14

• Manufacturer Part Number: 5962-8948403M3A
• Manufacturer: QP SEMICONDUCTOR

Specifications of 5962-8948403M3A

• Lead Free Status / RoHS Status: Supplier Unconfirmed

DSCC FORM 2234
APR 97
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-
883.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
Delta limits shall apply only to subgroup 1 of group C inspection and shall consist of tests specified in table IIB herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
c.
d.
e.
f.
g. All devices selected for testing shall be programmed with a checkerboard pattern or equivalent. After completion
a.
b. Test condition D or E. The test circuit shall be maintained by the manufacturer under document revision level
c.
d.
(1) Testing the entire lot using additional built-in test circuitry which allows the manufacturer to verify programmability
(2) If such compliance cannot be tested on an unprogrammed device, a sample shall be selected to satisfy
Subgroup 4 (C IN and C OUT measurements) shall be measured only for initial qualification and after any process or
Unprogrammed devices shall be tested for programmability and ac performance compliance to the requirements of
For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V,
O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may
The device selected for testing shall be programmed with a checkerboard pattern. After completion of all testing,
T
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
DEFENSE SUPPLY CENTER COLUMBUS
design changes which may affect input or output capacitance. Capacitance shall be measured between the designated
terminal and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures, and all input and output
terminals tested.
group A, subgroups 9, 10, and 11. Either of two techniques is acceptable:
subgroups 7 and 8 shall include verifying the functionality of the device; these tests shall have been fault graded in
accordance with MIL-STD-883, test method 5012 (see 1.6 herein).
affect the performance of the device. For device class M, procedures and circuits shall be maintained under document
revision level control by the manufacturer and shall be made available to the preparing activity or acquiring activity upon
request. For device classes Q and V, the procedures and circuits shall be under the control of the device
manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the preparing activity or
acquiring activity upon request. Testing shall be on all pins, on five devices with zero failures. Latch-up test shall be
considered destructive. Information contained in JEDEC Standard EIA/JESD78 may be used for reference.
of all testing, the devices shall be erased and verified, (except devices submitted for groups B, C, and D testing).
the devices shall be erased and verified (except devices submitted for group D testing).
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified
in test method 1005.
A
= +125°C, minimum.
and ac performance without programming the user array. If this is done, the resulting test patterns shall be verified
on all devices during subgroups 9, 10, and 11, group A testing in accordance with the sampling plan specified in
MIL-STD-883, method 5005.
programmability requirements prior to performing subgroups 9, 10, and 11. Twelve devices shall be submitted to
programming (see 3.2.3.2). If more than two devices fail to program, the lot shall be rejected. At the manufacturer's
option, the sample may be increased to 24 total devices with no more than 4 total device failures allowable. Ten
devices from the programmability sample shall be submitted to the requirements of group A, subgroups 9, 10, and
11. If more than two devices fail, the lot shall be rejected. At the manufacturer's option, the sample may be
increased to 20 total devices with no more than 4 total device failures allowable.
MICROCIRCUIT DRAWING
COLUMBUS, OHIO 43218-3990
STANDARD
SIZE
A
REVISION LEVEL
A
SHEET
5962-89484
14