MT45W8MW16BGX-701 IT Micron Technology Inc, MT45W8MW16BGX-701 IT Datasheet - Page 60

MT45W8MW16BGX-701 IT

Manufacturer Part Number
MT45W8MW16BGX-701 IT
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT45W8MW16BGX-701 IT

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
Figure 48:
PDF: 09005aef80ec6f79/Source: 09005aef80ec6f65
128mb_burst_cr1_5_p26z__2.fm - Rev. H 9/07 EN
2nd Cycle WRITE
2nd Cycle WRITE
2nd Cycle WRITE
DQ[15:0] IN
LB#/UB#
A[22:0]
ADV#
WAIT
WE#
OE#
CLK
CE#
Burst WRITE Interrupted by Burst WRITE or READ – Variable Latency Mode
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
IH
IL
IH
IL
IH
IL
OL
Notes:
High-Z
t CSP
t SP
t SP
t SP
Address
Valid
1. Non-default BCR settings for burst WRITE interrupted by burst WRITE or READ in variable
2. Burst interrupt shown on first allowable clock (i.e., after first data word written).
3. CE# can stay LOW between burst operations, but CE# must not remain LOW longer than
t HD
t HD
t HD
High-Z
latency mode: Variable latency; latency code two (three clocks); WAIT active LOW; WAIT
asserted during delay. All bursts shown for variable latency; no refresh collision.
t
CEM.
128Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Async/
2nd Cycle READ
2nd Cycle READ
2nd Cycle READ
DQ[15:0] OUT
t CLK
LB#/UB#
OE#
t SP
t SP t HD
D0
t HD
V
V
V
V
V
V
t CEW
IH
IL
IH
IL
OL
OH
t SP t HD
t SP
t SP t HD
ADDRESS
t SP
Address
VALID
Valid
60
t HD
t KHTL
WRITE Burst interrupted with new WRITE or READ. See Note 2.
V
V
OH
OL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
High-Z
t CEM (Note 3)
t ACLK
Page/Burst CellularRAM 1.5 Memory
t BOE
t SP
Output
Valid
D0
t KOH
t HD
Output
D1
Valid
©2004 Micron Technology, Inc. All rights reserved.
Don’t Care
D2
Output
Valid
D3
Output
Valid
t HD
t HD
t OHZ
Undefined
High-Z

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