MT45W8MW16BGX-701 IT Micron Technology Inc, MT45W8MW16BGX-701 IT Datasheet - Page 22

MT45W8MW16BGX-701 IT

Manufacturer Part Number
MT45W8MW16BGX-701 IT
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT45W8MW16BGX-701 IT

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
Software Access
Figure 16:
PDF: 09005aef80ec6f79/Source: 09005aef80ec6f65
128mb_burst_cr1_5_p26z__2.fm - Rev. H 9/07 EN
Load Configuration Register
Notes:
1. It is possible that the data stored at the highest memory location will be altered if the
Software access of the registers uses a sequence of asynchronous READ and asynchro-
nous WRITE operations. The contents of the configuration registers can be modified and
all registers can be read using the software sequence.
The configuration registers are loaded using a four-step sequence consisting of two
asynchronous READ operations followed by two asynchronous WRITE operations. (See
Figure 16.) The read sequence is virtually identical except that an asynchronous READ is
performed during the fourth operation. (See Figure 17 on page 23.) The address used
during all READ and WRITE operations is the highest address of the CellularRAM device
being accessed (7FFFFFh for 128Mb); the contents of this address are not changed by
using this sequence.
The data value presented during the third operation (WRITE) in the sequence defines
whether the BCR, RCR, or the DIDR is to be accessed. If the data is 0000h, the sequence
will access the RCR; if the data is 0001h, the sequence will access the BCR; if the data is
0002h, the sequence will access the DIDR. During the fourth operation, DQ[15:0]
transfer data in to or out of bits 15–0 of the registers.
The use of the software sequence does not affect the ability to perform the standard
(CRE-controlled) method of loading the configuration registers. However, the software
nature of this access mechanism eliminates the need for CRE. If the software mecha-
nism is used, CRE can simply be tied to V
purposes is no longer required.
ADDRESS
LB#/UB#
data at the falling edge of WE# is not 0000h or 0001h.
DATA
WE#
OE#
CE#
128Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Async/
Address
(MAX)
XXXXh
READ
Address
(MAX)
XXXXh
READ
22
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Page/Burst CellularRAM 1.5 Memory
RCR: 0000h
BCR: 0001h
SS
Address
(MAX)
WRITE
. The port line often used for CRE control
0ns (min) Note 1
CR Value
Address
(MAX)
WRITE
Don’t Care
In
©2004 Micron Technology, Inc. All rights reserved.

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